From mboxrd@z Thu Jan 1 00:00:00 1970 From: Evan Quan Subject: [PATCH 04/10] drm/amdgpu: correct direct reg list length for v2_0 rlc Date: Thu, 5 Jul 2018 17:09:29 +0800 Message-ID: <20180705090935.9638-4-evan.quan@amd.com> References: <20180705090935.9638-1-evan.quan@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20180705090935.9638-1-evan.quan-5C7GfCeVMHo@public.gmane.org> List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Evan Quan Rm9yIHYyXzAgcmxjLCBybGMgc2F2ZSByZXN0b3JlIGxpc3QgYWxzbyBuZWVkcyB0byBiZSBpbml0 aWFsaXplZC4KSG93ZXZlciwgdGhlcmUgaXMgbm8gcmVnX2xpc3RfZm9ybWF0X2RpcmVjdF9yZWdf bGlzdF9sZW5ndGgKbWVtYmVyKHYyXzEgc3BlZmljKSBmb3IgaXQuCgpDaGFuZ2UtSWQ6IEkyOWJm ZTQ0MWM0ZjRiNDcyNmE3ZGQ2MWIzMTUzNDdmZWEwNTcxNjNiClNpZ25lZC1vZmYtYnk6IEV2YW4g UXVhbiA8ZXZhbi5xdWFuQGFtZC5jb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2FtZC9hbWRncHUv Z2Z4X3Y5XzAuYyB8IDUgKysrLS0KIDEgZmlsZSBjaGFuZ2VkLCAzIGluc2VydGlvbnMoKyksIDIg ZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2FtZC9hbWRncHUvZ2Z4 X3Y5XzAuYyBiL2RyaXZlcnMvZ3B1L2RybS9hbWQvYW1kZ3B1L2dmeF92OV8wLmMKaW5kZXggOGQ4 OTVhZmE2YzY5Li44ZDg3MGQ0Zjg0MTQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9hbWQv YW1kZ3B1L2dmeF92OV8wLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2FtZC9hbWRncHUvZ2Z4X3Y5 XzAuYwpAQCAtNDIsNiArNDIsNyBAQAogI2RlZmluZSBHRlg5X01FQ19IUERfU0laRSAyMDQ4CiAj ZGVmaW5lIFJMQ0dfVUNPREVfTE9BRElOR19TVEFSVF9BRERSRVNTIDB4MDAwMDIwMDBMCiAjZGVm aW5lIFJMQ19TQVZFX1JFU1RPUkVfQUREUl9TVEFSVElOR19PRkZTRVQgMHgwMDAwMDAwMEwKKyNk ZWZpbmUgR0ZYOV9STENfRk9STUFUX0RJUkVDVF9SRUdfTElTVF9MRU5HVEggMzQKIAogI2RlZmlu ZSBtbVBXUl9NSVNDX0NOVExfU1RBVFVTCQkJCQkweDAxODMKICNkZWZpbmUgbW1QV1JfTUlTQ19D TlRMX1NUQVRVU19CQVNFX0lEWAkJCQkwCkBAIC0xOTI3LDcgKzE5MjgsNyBAQCBzdGF0aWMgaW50 IGdmeF92OV8xX2luaXRfcmxjX3NhdmVfcmVzdG9yZV9saXN0KHN0cnVjdCBhbWRncHVfZGV2aWNl ICphZGV2KQogCS8qIHNldHVwIHVuaXF1ZV9pbmRpcmVjdF9yZWdzIGFycmF5IGFuZCBpbmRpcmVj dF9zdGFydF9vZmZzZXRzIGFycmF5ICovCiAJdW5pcXVlX2luZGlyZWN0X3JlZ19jb3VudCA9IEFS UkFZX1NJWkUodW5pcXVlX2luZGlyZWN0X3JlZ3MpOwogCWdmeF92OV8xX3BhcnNlX2luZF9yZWdf bGlzdChyZWdpc3Rlcl9saXN0X2Zvcm1hdCwKLQkJCQkgICAgYWRldi0+Z2Z4LnJsYy5yZWdfbGlz dF9mb3JtYXRfZGlyZWN0X3JlZ19saXN0X2xlbmd0aCwKKwkJCQkgICAgR0ZYOV9STENfRk9STUFU X0RJUkVDVF9SRUdfTElTVF9MRU5HVEgsCiAJCQkJICAgIGFkZXYtPmdmeC5ybGMucmVnX2xpc3Rf Zm9ybWF0X3NpemVfYnl0ZXMgPj4gMiwKIAkJCQkgICAgdW5pcXVlX2luZGlyZWN0X3JlZ3MsCiAJ CQkJICAgIHVuaXF1ZV9pbmRpcmVjdF9yZWdfY291bnQsCkBAIC0xOTUyLDcgKzE5NTMsNyBAQCBz dGF0aWMgaW50IGdmeF92OV8xX2luaXRfcmxjX3NhdmVfcmVzdG9yZV9saXN0KHN0cnVjdCBhbWRn cHVfZGV2aWNlICphZGV2KQogCQlhZGV2LT5nZngucmxjLnJlZ19saXN0X2Zvcm1hdF9zdGFydCk7 CiAKIAkvKiBkaXJlY3QgcmVnaXN0ZXIgcG9ydGlvbiAqLwotCWZvciAoaSA9IDA7IGkgPCBhZGV2 LT5nZngucmxjLnJlZ19saXN0X2Zvcm1hdF9kaXJlY3RfcmVnX2xpc3RfbGVuZ3RoOyBpKyspCisJ Zm9yIChpID0gMDsgaSA8IEdGWDlfUkxDX0ZPUk1BVF9ESVJFQ1RfUkVHX0xJU1RfTEVOR1RIOyBp KyspCiAJCVdSRUczMihTT0MxNV9SRUdfT0ZGU0VUKEdDLCAwLCBtbVJMQ19HUE1fU0NSQVRDSF9E QVRBKSwKIAkJCXJlZ2lzdGVyX2xpc3RfZm9ybWF0W2ldKTsKIAotLSAKMi4xOC4wCgpfX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwphbWQtZ2Z4IG1haWxpbmcg bGlzdAphbWQtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNr dG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2FtZC1nZngK