From mboxrd@z Thu Jan 1 00:00:00 1970 From: Huang Rui Subject: Re: [PATCH 04/10] drm/amdgpu: correct direct reg list length for v2_0 rlc Date: Thu, 5 Jul 2018 23:06:45 +0800 Message-ID: <20180705150644.GA30498@hr-amur2> References: <20180705090935.9638-1-evan.quan@amd.com> <20180705090935.9638-4-evan.quan@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20180705090935.9638-4-evan.quan-5C7GfCeVMHo@public.gmane.org> List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: Evan Quan Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org T24gVGh1LCBKdWwgMDUsIDIwMTggYXQgMDU6MDk6MjlQTSArMDgwMCwgRXZhbiBRdWFuIHdyb3Rl Ogo+IEZvciB2Ml8wIHJsYywgcmxjIHNhdmUgcmVzdG9yZSBsaXN0IGFsc28gbmVlZHMgdG8gYmUg aW5pdGlhbGl6ZWQuCj4gSG93ZXZlciwgdGhlcmUgaXMgbm8gcmVnX2xpc3RfZm9ybWF0X2RpcmVj dF9yZWdfbGlzdF9sZW5ndGgKPiBtZW1iZXIodjJfMSBzcGVmaWMpIGZvciBpdC4KPiAKPiBDaGFu Z2UtSWQ6IEkyOWJmZTQ0MWM0ZjRiNDcyNmE3ZGQ2MWIzMTUzNDdmZWEwNTcxNjNiCj4gU2lnbmVk LW9mZi1ieTogRXZhbiBRdWFuIDxldmFuLnF1YW5AYW1kLmNvbT4KPiAtLS0KPiAgZHJpdmVycy9n cHUvZHJtL2FtZC9hbWRncHUvZ2Z4X3Y5XzAuYyB8IDUgKysrLS0KPiAgMSBmaWxlIGNoYW5nZWQs IDMgaW5zZXJ0aW9ucygrKSwgMiBkZWxldGlvbnMoLSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL2FtZC9hbWRncHUvZ2Z4X3Y5XzAuYyBiL2RyaXZlcnMvZ3B1L2RybS9hbWQvYW1k Z3B1L2dmeF92OV8wLmMKPiBpbmRleCA4ZDg5NWFmYTZjNjkuLjhkODcwZDRmODQxNCAxMDA2NDQK PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vYW1kL2FtZGdwdS9nZnhfdjlfMC5jCj4gKysrIGIvZHJp dmVycy9ncHUvZHJtL2FtZC9hbWRncHUvZ2Z4X3Y5XzAuYwo+IEBAIC00Miw2ICs0Miw3IEBACj4g ICNkZWZpbmUgR0ZYOV9NRUNfSFBEX1NJWkUgMjA0OAo+ICAjZGVmaW5lIFJMQ0dfVUNPREVfTE9B RElOR19TVEFSVF9BRERSRVNTIDB4MDAwMDIwMDBMCj4gICNkZWZpbmUgUkxDX1NBVkVfUkVTVE9S RV9BRERSX1NUQVJUSU5HX09GRlNFVCAweDAwMDAwMDAwTAo+ICsjZGVmaW5lIEdGWDlfUkxDX0ZP Uk1BVF9ESVJFQ1RfUkVHX0xJU1RfTEVOR1RIIDM0Cj4gIAo+ICAjZGVmaW5lIG1tUFdSX01JU0Nf Q05UTF9TVEFUVVMJCQkJCTB4MDE4Mwo+ICAjZGVmaW5lIG1tUFdSX01JU0NfQ05UTF9TVEFUVVNf QkFTRV9JRFgJCQkJMAo+IEBAIC0xOTI3LDcgKzE5MjgsNyBAQCBzdGF0aWMgaW50IGdmeF92OV8x X2luaXRfcmxjX3NhdmVfcmVzdG9yZV9saXN0KHN0cnVjdCBhbWRncHVfZGV2aWNlICphZGV2KQo+ ICAJLyogc2V0dXAgdW5pcXVlX2luZGlyZWN0X3JlZ3MgYXJyYXkgYW5kIGluZGlyZWN0X3N0YXJ0 X29mZnNldHMgYXJyYXkgKi8KPiAgCXVuaXF1ZV9pbmRpcmVjdF9yZWdfY291bnQgPSBBUlJBWV9T SVpFKHVuaXF1ZV9pbmRpcmVjdF9yZWdzKTsKPiAgCWdmeF92OV8xX3BhcnNlX2luZF9yZWdfbGlz dChyZWdpc3Rlcl9saXN0X2Zvcm1hdCwKPiAtCQkJCSAgICBhZGV2LT5nZngucmxjLnJlZ19saXN0 X2Zvcm1hdF9kaXJlY3RfcmVnX2xpc3RfbGVuZ3RoLAo+ICsJCQkJICAgIEdGWDlfUkxDX0ZPUk1B VF9ESVJFQ1RfUkVHX0xJU1RfTEVOR1RILAo+ICAJCQkJICAgIGFkZXYtPmdmeC5ybGMucmVnX2xp c3RfZm9ybWF0X3NpemVfYnl0ZXMgPj4gMiwKPiAgCQkJCSAgICB1bmlxdWVfaW5kaXJlY3RfcmVn cywKPiAgCQkJCSAgICB1bmlxdWVfaW5kaXJlY3RfcmVnX2NvdW50LAo+IEBAIC0xOTUyLDcgKzE5 NTMsNyBAQCBzdGF0aWMgaW50IGdmeF92OV8xX2luaXRfcmxjX3NhdmVfcmVzdG9yZV9saXN0KHN0 cnVjdCBhbWRncHVfZGV2aWNlICphZGV2KQo+ICAJCWFkZXYtPmdmeC5ybGMucmVnX2xpc3RfZm9y bWF0X3N0YXJ0KTsKPiAgCj4gIAkvKiBkaXJlY3QgcmVnaXN0ZXIgcG9ydGlvbiAqLwo+IC0JZm9y IChpID0gMDsgaSA8IGFkZXYtPmdmeC5ybGMucmVnX2xpc3RfZm9ybWF0X2RpcmVjdF9yZWdfbGlz dF9sZW5ndGg7IGkrKykKPiArCWZvciAoaSA9IDA7IGkgPCBHRlg5X1JMQ19GT1JNQVRfRElSRUNU X1JFR19MSVNUX0xFTkdUSDsgaSsrKQoKVGhpcyBkZWZpbml0aW9uIGlzIGFjdHVhbGx5IGRlZmlu ZWQgb24gcmVnaXN0ZXJfbGlzdF9mb3JtYXQuaCBpbiB0aGUgdWNvZGUuClNvIHdlIHdvdWxkIGJl dHRlciB0byBwdXQgaXQgaW4gZmlybXdhcmUgaGVhZGVyLgoKVGhhbmtzLApSYXkKCj4gIAkJV1JF RzMyKFNPQzE1X1JFR19PRkZTRVQoR0MsIDAsIG1tUkxDX0dQTV9TQ1JBVENIX0RBVEEpLAo+ICAJ CQlyZWdpc3Rlcl9saXN0X2Zvcm1hdFtpXSk7Cj4gIAo+IC0tIAo+IDIuMTguMAo+IAo+IF9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCj4gYW1kLWdmeCBtYWls aW5nIGxpc3QKPiBhbWQtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwo+IGh0dHBzOi8vbGlzdHMu ZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vYW1kLWdmeApfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwphbWQtZ2Z4IG1haWxpbmcgbGlzdAphbWQt Z2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9t YWlsbWFuL2xpc3RpbmZvL2FtZC1nZngK