From: "Christian König" <ckoenig.leichtzumerken-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: [PATCH 12/12] drm/amdgpu: disable IH ring 2 WPTR overflow on Vega10
Date: Wed, 26 Sep 2018 15:53:30 +0200 [thread overview]
Message-ID: <20180926135330.2218-12-christian.koenig@amd.com> (raw)
In-Reply-To: <20180926135330.2218-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
That should add back pressure on the client.
Signed-off-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index dd155a207fdd..c8525c29fc16 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -207,6 +207,8 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
ih_rb_cntl = vega10_ih_rb_cntl(ih, ih_rb_cntl);
+ ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING2,
+ WPTR_OVERFLOW_ENABLE, 0);
WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl);
/* set rptr, wptr to 0 */
--
2.14.1
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next prev parent reply other threads:[~2018-09-26 13:53 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-26 13:53 [PATCH 01/12] drm/amdgpu: add missing error handling Christian König
[not found] ` <20180926135330.2218-1-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-09-26 13:53 ` [PATCH 02/12] drm/amdgpu: send IVs to the KFD only after processing them Christian König
[not found] ` <20180926135330.2218-2-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-09-26 18:24 ` Jay Cornwall
[not found] ` <1537986270.3887323.1521702048.0DEA7A63-2RFepEojUI2N1INw9kWLP6GC3tUn3ZHUQQ4Iyu8u01E@public.gmane.org>
2018-09-27 9:32 ` Christian König
2018-09-26 13:53 ` [PATCH 03/12] drm/amdgpu: remove VM fault_credit handling Christian König
2018-09-26 13:53 ` [PATCH 04/12] drm/amdgpu: move IV prescreening into the GMC code Christian König
[not found] ` <20180926135330.2218-4-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-10-09 23:46 ` Felix Kuehling
[not found] ` <dcf7fd50-e453-8a9d-cdaa-c452d4716e9a-5C7GfCeVMHo@public.gmane.org>
2018-10-10 7:08 ` Christian König
2018-09-26 13:53 ` [PATCH 05/12] drm/amdgpu: remove IV prescreening Christian König
[not found] ` <20180926135330.2218-5-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-09-27 10:28 ` Huang Rui
2018-09-26 13:53 ` [PATCH 06/12] drm/amdgpu: add IH ring to ih_get_wptr/ih_set_rptr v2 Christian König
2018-09-26 13:53 ` [PATCH 07/12] drm/amdgpu: simplify IH programming Christian König
2018-09-26 13:53 ` [PATCH 08/12] drm/amdgpu: enable IH ring 1 and ring 2 v2 Christian König
2018-09-26 13:53 ` [PATCH 09/12] drm/amdgpu: add the IH to the IV trace Christian König
2018-09-26 13:53 ` [PATCH 10/12] drm/amdgpu: add support for processing IH ring 1 & 2 Christian König
2018-09-26 13:53 ` [PATCH 11/12] drm/amdgpu: add support for self irq on Vega10 Christian König
[not found] ` <20180926135330.2218-11-christian.koenig-5C7GfCeVMHo@public.gmane.org>
2018-09-26 19:19 ` Alex Deucher
2018-09-26 13:53 ` Christian König [this message]
2018-09-27 10:00 ` [PATCH 01/12] drm/amdgpu: add missing error handling Huang Rui
2018-09-27 11:25 ` Christian König
[not found] ` <e3ab66c9-41b1-c0cd-8f72-07f4eebff70b-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-09-28 7:36 ` Huang, Ray
[not found] ` <BY2PR12MB0040E69C83DAC1B5136F95E4ECEC0-K//h7OWB4q7Zvl48JdS6+wdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2018-10-03 14:25 ` Christian König
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