From: Aleksandr Mezin <mezin.alexander-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: "David (ChunMing) Zhou"
<David1.Zhou-5C7GfCeVMHo@public.gmane.org>,
"David Airlie" <airlied-cv59FeDIM0c@public.gmane.org>,
"Aleksandr Mezin"
<mezin.alexander-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"Alex Deucher" <alexander.deucher-5C7GfCeVMHo@public.gmane.org>,
"Evan Quan" <evan.quan-5C7GfCeVMHo@public.gmane.org>,
"Rex Zhu" <rex.zhu-5C7GfCeVMHo@public.gmane.org>,
"Christian König" <christian.koenig-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 1/2] drm/amd/powerplay: add max_power_limit to pp_hwmgr
Date: Thu, 4 Oct 2018 03:59:50 +0600 [thread overview]
Message-ID: <20181003220300.5931-1-mezin.alexander@gmail.com> (raw)
And initialize it to the default limit for now.
Will allow increasing the power limit on select cards.
Signed-off-by: Aleksandr Mezin <mezin.alexander@gmail.com>
---
drivers/gpu/drm/amd/include/kgd_pp_interface.h | 2 +-
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8 ++++----
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c | 2 ++
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c | 1 +
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 1 +
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
6 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index bd7404532029..be6c6c9eb5d1 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -243,7 +243,7 @@ struct amd_pm_funcs {
uint32_t block_type, bool gate);
int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
int (*set_power_limit)(void *handle, uint32_t n);
- int (*get_power_limit)(void *handle, uint32_t *limit, bool default_limit);
+ int (*get_power_limit)(void *handle, uint32_t *limit, bool max_limit);
int (*get_power_profile_mode)(void *handle, char *buf);
int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
int (*odn_edit_dpm_table)(void *handle, uint32_t type, long *input, uint32_t size);
diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index da4ebff5b74d..b8c96b6d4923 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -937,7 +937,7 @@ static int pp_set_power_limit(void *handle, uint32_t limit)
if (limit == 0)
limit = hwmgr->default_power_limit;
- if (limit > hwmgr->default_power_limit)
+ if (limit > hwmgr->max_power_limit)
return -EINVAL;
mutex_lock(&hwmgr->smu_lock);
@@ -947,7 +947,7 @@ static int pp_set_power_limit(void *handle, uint32_t limit)
return 0;
}
-static int pp_get_power_limit(void *handle, uint32_t *limit, bool default_limit)
+static int pp_get_power_limit(void *handle, uint32_t *limit, bool max_limit)
{
struct pp_hwmgr *hwmgr = handle;
@@ -956,8 +956,8 @@ static int pp_get_power_limit(void *handle, uint32_t *limit, bool default_limit)
mutex_lock(&hwmgr->smu_lock);
- if (default_limit)
- *limit = hwmgr->default_power_limit;
+ if (max_limit)
+ *limit = hwmgr->max_power_limit;
else
*limit = hwmgr->power_limit;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c
index 5e19f5977eb1..5e273c8cd0c4 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c
@@ -1140,6 +1140,8 @@ int smu7_enable_power_containment(struct pp_hwmgr *hwmgr)
if (0 == smc_result) {
hwmgr->default_power_limit = hwmgr->power_limit =
cac_table->usMaximumPowerDeliveryLimit;
+ hwmgr->max_power_limit =
+ hwmgr->default_power_limit;
data->power_containment_features |=
POWERCONTAINMENT_FEATURE_PkgPwrLimit;
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c
index 2d88abf97e7b..a6432f9a75b4 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c
@@ -1342,6 +1342,7 @@ int vega10_enable_power_containment(struct pp_hwmgr *hwmgr)
hwmgr->default_power_limit = hwmgr->power_limit =
(uint32_t)(tdp_table->usMaximumPowerDeliveryLimit);
+ hwmgr->max_power_limit = hwmgr->default_power_limit;
if (PP_CAP(PHM_PlatformCaps_PowerContainment)) {
if (data->smu_features[GNLD_PPT].supported)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index 7884ae3b1922..56060b943e7a 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -1554,6 +1554,7 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr)
return result);
hwmgr->power_limit =
hwmgr->default_power_limit = smum_get_argument(hwmgr);
+ hwmgr->max_power_limit = hwmgr->default_power_limit;
return 0;
}
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index a6d92128b19c..094d25831e57 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -764,6 +764,7 @@ struct pp_hwmgr {
bool od_enabled;
uint32_t power_limit;
uint32_t default_power_limit;
+ uint32_t max_power_limit;
uint32_t workload_mask;
uint32_t workload_prority[Workload_Policy_Max];
uint32_t workload_setting[Workload_Policy_Max];
--
2.19.0
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next reply other threads:[~2018-10-03 21:59 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-03 21:59 Aleksandr Mezin [this message]
[not found] ` <20181003220300.5931-1-mezin.alexander-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-03 21:59 ` [PATCH 2/2] drm/amd/vega10: allow increased power limit Aleksandr Mezin
[not found] ` <20181003220300.5931-2-mezin.alexander-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-11 3:28 ` Alex Deucher
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