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From: "Kim, Jonathan" <Jonathan.Kim-5C7GfCeVMHo@public.gmane.org>
To: "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org"
	<amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org>
Cc: "Deucher,
	Alexander" <Alexander.Deucher-5C7GfCeVMHo@public.gmane.org>,
	"Kuehling, Felix" <Felix.Kuehling-5C7GfCeVMHo@public.gmane.org>,
	"Kim, Jonathan" <Jonathan.Kim-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 2/2] Revert "drm/amdgpu: disable c-states on xgmi perfmons"
Date: Fri, 18 Oct 2019 17:59:44 +0000	[thread overview]
Message-ID: <20191018175928.25307-2-jonathan.kim@amd.com> (raw)
In-Reply-To: <20191018175928.25307-1-jonathan.kim-5C7GfCeVMHo@public.gmane.org>

This reverts commit 54275cd1649f4034c6450b6c5a8358fcd4f7dda6.

incomplete solution to df c-state race condition.  smu msg in perf events
causes deadlock.

Change-Id: Ia85179df2bd167657e42a2d828c4a7c475c392ff
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 36 +---------------------------
 1 file changed, 1 insertion(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
index f403c62c944e..16fbd2bc8ad1 100644
--- a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
+++ b/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
@@ -93,21 +93,6 @@ const struct attribute_group *df_v3_6_attr_groups[] = {
 		NULL
 };
 
-static df_v3_6_set_df_cstate(struct amdgpu_device *adev, int allow)
-{
-	int r = 0;
-
-	if (is_support_sw_smu(adev)) {
-		r = smu_set_df_cstate(&adev->smu, allow);
-	} else if (adev->powerplay.pp_funcs
-			&& adev->powerplay.pp_funcs->set_df_cstate) {
-		r = adev->powerplay.pp_funcs->set_df_cstate(
-			adev->powerplay.pp_handle, allow);
-	}
-
-	return r;
-}
-
 static uint64_t df_v3_6_get_fica(struct amdgpu_device *adev,
 				 uint32_t ficaa_val)
 {
@@ -117,9 +102,6 @@ static uint64_t df_v3_6_get_fica(struct amdgpu_device *adev,
 	address = adev->nbio.funcs->get_pcie_index_offset(adev);
 	data = adev->nbio.funcs->get_pcie_data_offset(adev);
 
-	if (df_v3_6_set_df_cstate(adev, DF_CSTATE_DISALLOW))
-		return 0xFFFFFFFFFFFFFFFF;
-
 	spin_lock_irqsave(&adev->pcie_idx_lock, flags);
 	WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessAddress3);
 	WREG32(data, ficaa_val);
@@ -132,8 +114,6 @@ static uint64_t df_v3_6_get_fica(struct amdgpu_device *adev,
 
 	spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
 
-	df_v3_6_set_df_cstate(adev, DF_CSTATE_ALLOW);
-
 	return (((ficadh_val & 0xFFFFFFFFFFFFFFFF) << 32) | ficadl_val);
 }
 
@@ -145,9 +125,6 @@ static void df_v3_6_set_fica(struct amdgpu_device *adev, uint32_t ficaa_val,
 	address = adev->nbio.funcs->get_pcie_index_offset(adev);
 	data = adev->nbio.funcs->get_pcie_data_offset(adev);
 
-	if (df_v3_6_set_df_cstate(adev, DF_CSTATE_DISALLOW))
-		return;
-
 	spin_lock_irqsave(&adev->pcie_idx_lock, flags);
 	WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessAddress3);
 	WREG32(data, ficaa_val);
@@ -157,9 +134,8 @@ static void df_v3_6_set_fica(struct amdgpu_device *adev, uint32_t ficaa_val,
 
 	WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessDataHi3);
 	WREG32(data, ficadh_val);
-	spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
 
-	df_v3_6_set_df_cstate(adev, DF_CSTATE_ALLOW);
+	spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
 }
 
 /*
@@ -177,17 +153,12 @@ static void df_v3_6_perfmon_rreg(struct amdgpu_device *adev,
 	address = adev->nbio.funcs->get_pcie_index_offset(adev);
 	data = adev->nbio.funcs->get_pcie_data_offset(adev);
 
-	if (df_v3_6_set_df_cstate(adev, DF_CSTATE_DISALLOW))
-		return;
-
 	spin_lock_irqsave(&adev->pcie_idx_lock, flags);
 	WREG32(address, lo_addr);
 	*lo_val = RREG32(data);
 	WREG32(address, hi_addr);
 	*hi_val = RREG32(data);
 	spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
-
-	df_v3_6_set_df_cstate(adev, DF_CSTATE_ALLOW);
 }
 
 /*
@@ -204,17 +175,12 @@ static void df_v3_6_perfmon_wreg(struct amdgpu_device *adev, uint32_t lo_addr,
 	address = adev->nbio.funcs->get_pcie_index_offset(adev);
 	data = adev->nbio.funcs->get_pcie_data_offset(adev);
 
-	if (df_v3_6_set_df_cstate(adev, DF_CSTATE_DISALLOW))
-		return;
-
 	spin_lock_irqsave(&adev->pcie_idx_lock, flags);
 	WREG32(address, lo_addr);
 	WREG32(data, lo_val);
 	WREG32(address, hi_addr);
 	WREG32(data, hi_val);
 	spin_unlock_irqrestore(&adev->pcie_idx_lock, flags);
-
-	df_v3_6_set_df_cstate(adev, DF_CSTATE_ALLOW);
 }
 
 /* get the number of df counters available */
-- 
2.17.1

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  parent reply	other threads:[~2019-10-18 17:59 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-18 17:59 [PATCH] Revert "drm/amdgpu: fix compiler warnings for df perfmons" Kim, Jonathan
     [not found] ` <20191018175928.25307-1-jonathan.kim-5C7GfCeVMHo@public.gmane.org>
2019-10-18 17:59   ` Kim, Jonathan [this message]
     [not found]     ` <20191018175928.25307-2-jonathan.kim-5C7GfCeVMHo@public.gmane.org>
2019-10-18 19:18       ` [PATCH 2/2] Revert "drm/amdgpu: disable c-states on xgmi perfmons" Kuehling, Felix
  -- strict thread matches above, loose matches on Subject: below --
2019-10-18 17:30 [PATCH 1/2] Revert "drm/amdgpu: fix compiler warnings for df perfmons" Kim, Jonathan
     [not found] ` <20191018172934.24716-1-jonathan.kim-5C7GfCeVMHo@public.gmane.org>
2019-10-18 17:30   ` [PATCH 2/2] Revert "drm/amdgpu: disable c-states on xgmi perfmons" Kim, Jonathan

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