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[156.34.48.30]) by smtp.gmail.com with ESMTPSA id o6sm6016053qtd.59.2020.06.19.04.39.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jun 2020 04:39:35 -0700 (PDT) Received: from jgg by mlx with local (Exim 4.93) (envelope-from ) id 1jmFMs-00AiVa-OZ; Fri, 19 Jun 2020 08:39:34 -0300 Date: Fri, 19 Jun 2020 08:39:34 -0300 From: Jason Gunthorpe To: Daniel Vetter Subject: Re: [Linaro-mm-sig] [PATCH 04/18] dma-fence: prime lockdep annotations Message-ID: <20200619113934.GN6578@ziepe.ca> References: <20200604081224.863494-5-daniel.vetter@ffwll.ch> <20200611083430.GD20149@phenom.ffwll.local> <20200611141515.GW6578@ziepe.ca> <20200616120719.GL20149@phenom.ffwll.local> <20200617152835.GF6578@ziepe.ca> <20200618150051.GS20149@phenom.ffwll.local> <20200618172338.GM6578@ziepe.ca> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailman-Approved-At: Fri, 19 Jun 2020 15:09:43 +0000 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rdma , Thomas =?utf-8?B?SGVsbHN0csO2bSAoSW50ZWwp?= , Maarten Lankhorst , LKML , DRI Development , Christian =?utf-8?B?S8O2bmln?= , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Thomas Hellstrom , amd-gfx list , Daniel Vetter , Mika Kuoppala , Intel Graphics Development , "open list:DMA BUFFER SHARING FRAMEWORK" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Fri, Jun 19, 2020 at 09:22:09AM +0200, Daniel Vetter wrote: > > As I've understood GPU that means you need to show that the commands > > associated with the buffer have completed. This is all local stuff > > within the driver, right? Why use fence (other than it already exists) > > Because that's the end-of-dma thing. And it's cross-driver for the > above reasons, e.g. > - device A renders some stuff. Userspace gets dma_fence A out of that > (well sync_file or one of the other uapi interfaces, but you get the > idea) > - userspace (across process or just different driver) issues more > rendering for device B, which depends upon the rendering done on > device A. So dma_fence A is an dependency and will block this dma > operation. Userspace (and the kernel) gets dma_fence B out of this > - because unfortunate reasons, the same rendering on device B also > needs a userptr buffer, which means that dma_fence B is also the one > that the mmu_range_notifier needs to wait on before it can tell core > mm that it can go ahead and release those pages I was afraid you'd say this - this is complete madness for other DMA devices to borrow the notifier hook of the first device! What if the first device is a page faulting device and doesn't call dma_fence?? It you are going to treat things this way then the mmu notifier really needs to be part of the some core DMA buf, and not randomly sprinkled in drivers But really this is what page pinning is supposed to be used for, the MM behavior when it blocks on a pinned page is less invasive than if it stalls inside a mmu notifier. You can mix it, use mmu notififers to keep track if the buffer is still live, but when you want to trigger DMA then pin the pages and keep them pinned until DMA is done. The pin protects things (well, fork is still a problem) Do not need to wait on dma_fence in notifiers. Jason _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx