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[156.34.48.30]) by smtp.gmail.com with ESMTPSA id z77sm7263705qka.59.2020.06.19.10.23.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jun 2020 10:23:08 -0700 (PDT) Received: from jgg by mlx with local (Exim 4.93) (envelope-from ) id 1jmKjM-00ArZ4-2Z; Fri, 19 Jun 2020 14:23:08 -0300 Date: Fri, 19 Jun 2020 14:23:08 -0300 From: Jason Gunthorpe To: Daniel Vetter Subject: Re: [Linaro-mm-sig] [PATCH 04/18] dma-fence: prime lockdep annotations Message-ID: <20200619172308.GQ6578@ziepe.ca> References: <20200616120719.GL20149@phenom.ffwll.local> <20200617152835.GF6578@ziepe.ca> <20200618150051.GS20149@phenom.ffwll.local> <20200618172338.GM6578@ziepe.ca> <20200619113934.GN6578@ziepe.ca> <20200619151551.GP6578@ziepe.ca> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailman-Approved-At: Fri, 19 Jun 2020 17:23:49 +0000 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-rdma , Thomas =?utf-8?B?SGVsbHN0csO2bSAoSW50ZWwp?= , Maarten Lankhorst , LKML , DRI Development , Christian =?utf-8?B?S8O2bmln?= , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Thomas Hellstrom , amd-gfx list , Daniel Vetter , Mika Kuoppala , Intel Graphics Development , "open list:DMA BUFFER SHARING FRAMEWORK" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Fri, Jun 19, 2020 at 06:19:41PM +0200, Daniel Vetter wrote: > The madness is only that device B's mmu notifier might need to wait > for fence_B so that the dma operation finishes. Which in turn has to > wait for device A to finish first. So, it sound, fundamentally you've got this graph of operations across an unknown set of drivers and the kernel cannot insert itself in dma_fence hand offs to re-validate any of the buffers involved? Buffers which by definition cannot be touched by the hardware yet. That really is a pretty horrible place to end up.. Pinning really is right answer for this kind of work flow. I think converting pinning to notifers should not be done unless notifier invalidation is relatively bounded. I know people like notifiers because they give a bit nicer performance in some happy cases, but this cripples all the bad cases.. If pinning doesn't work for some reason maybe we should address that? > Full disclosure: We are aware that we've designed ourselves into an > impressive corner here, and there's lots of talks going on about > untangling the dma synchronization from the memory management > completely. But I think the documenting is really important: only GPU should be using this stuff and driving notifiers this way. Complete NO for any totally-not-a-GPU things in drivers/accel for sure. Jason _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx