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From: Evan Quan <evan.quan@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, Evan Quan <evan.quan@amd.com>
Subject: [PATCH 01/16] drm/amd/powerplay: add more members for dpm table
Date: Fri, 10 Jul 2020 12:47:31 +0800	[thread overview]
Message-ID: <20200710044746.23538-1-evan.quan@amd.com> (raw)

These members can help to cache the clock frequencies for all
dpm levels. Then simplifying the code for dpm level switching
is possible.

Change-Id: Ic80359adb8c0e018f306782f24e3f8906436f5e2
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
index 3d746b75396e..289c571d6e4e 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
@@ -48,6 +48,7 @@
 
 #define SMU11_TOOL_SIZE			0x19000
 
+#define MAX_DPM_LEVELS 16
 #define MAX_PCIE_CONF 2
 
 #define CLK_MAP(clk, index) \
@@ -91,9 +92,17 @@ struct smu_11_0_max_sustainable_clocks {
 	uint32_t soc_clock;
 };
 
+struct smu_11_0_dpm_clk_level {
+	bool				enabled;
+	uint32_t			value;
+};
+
 struct smu_11_0_dpm_table {
-	uint32_t    min;        /* MHz */
-	uint32_t    max;        /* MHz */
+	uint32_t			min;        /* MHz */
+	uint32_t			max;        /* MHz */
+	uint32_t			count;
+	bool				is_fine_grained;
+	struct smu_11_0_dpm_clk_level	dpm_levels[MAX_DPM_LEVELS];
 };
 
 struct smu_11_0_pcie_table {
@@ -107,7 +116,9 @@ struct smu_11_0_dpm_tables {
 	struct smu_11_0_dpm_table        uclk_table;
 	struct smu_11_0_dpm_table        eclk_table;
 	struct smu_11_0_dpm_table        vclk_table;
+	struct smu_11_0_dpm_table        vclk1_table;
 	struct smu_11_0_dpm_table        dclk_table;
+	struct smu_11_0_dpm_table        dclk1_table;
 	struct smu_11_0_dpm_table        dcef_table;
 	struct smu_11_0_dpm_table        pixel_table;
 	struct smu_11_0_dpm_table        display_table;
-- 
2.27.0

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             reply	other threads:[~2020-07-10  4:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-10  4:47 Evan Quan [this message]
2020-07-10  4:47 ` [PATCH 02/16] drm/amd/powerplay: implement a common set dpm table API for smu V11 Evan Quan
2020-07-13 14:49   ` Alex Deucher
2020-07-10  4:47 ` [PATCH 03/16] drm/amd/powerplay: update Arcturus default dpm table setting Evan Quan
2020-07-13 14:49   ` Alex Deucher
2020-07-10  4:47 ` [PATCH 04/16] drm/amd/powerplay: update Navi10 default dpm table setup Evan Quan
2020-07-10  4:47 ` [PATCH 05/16] drm/amd/powerplay: update Sienna Cichlid " Evan Quan
2020-07-10  4:47 ` [PATCH 06/16] drm/amd/powerplay: add new UMD pstate data structure Evan Quan
2020-07-10  4:47 ` [PATCH 07/16] drm/amd/powerplay: update UMD pstate clock settings Evan Quan
2020-07-10  4:47 ` [PATCH 08/16] drm/amd/powerplay: update the common API for performance level setting Evan Quan
2020-07-10  4:47 ` [PATCH 09/16] drm/amd/powerplay: drop unnecessary Arcturus specific APIs Evan Quan
2020-07-10  4:47 ` [PATCH 10/16] drm/amd/powerplay: drop unnecessary Navi1x " Evan Quan
2020-07-10  4:47 ` [PATCH 11/16] drm/amd/powerplay: drop unnecessary Sienna Cichlid " Evan Quan
2020-07-10  4:47 ` [PATCH 12/16] drm/amd/powerplay: drop Sienna Cichlid specific set_soft_freq_limited_range Evan Quan
2020-07-13 14:53   ` Alex Deucher
2020-07-10  4:47 ` [PATCH 13/16] drm/amd/powerplay: apply gfxoff disablement/enablement for all SMU11 ASICs Evan Quan
2020-07-13  3:44   ` Quan, Evan
2020-07-14  6:55     ` Quan, Evan
2020-07-14 13:48       ` Deucher, Alexander
2020-07-10  4:47 ` [PATCH 14/16] drm/amd/powerplay: drop unnecessary wrappers Evan Quan
2020-07-10  4:47 ` [PATCH 15/16] drm/amd/powerplay: drop smu_v12_0.c unnecessary wrapper Evan Quan
2020-07-10  4:47 ` [PATCH 16/16] drm/amd/powerplay: drop unused APIs and parameters Evan Quan

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