From: Wenhui Sheng <Wenhui.Sheng@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: Likun Gao <Likun.Gao@amd.com>,
Wenhui Sheng <Wenhui.Sheng@amd.com>,
Hawking Zhang <Hawking.Zhang@amd.com>
Subject: [PATCH 4/4] drm/amdgpu: add mode1 reset module parameter
Date: Fri, 10 Jul 2020 13:46:26 +0800 [thread overview]
Message-ID: <20200710054626.2487-4-Wenhui.Sheng@amd.com> (raw)
In-Reply-To: <20200710054626.2487-1-Wenhui.Sheng@amd.com>
For sienna cichlid, defaut path is baco reset, only
when parameter mode1_reset is set, mode1 reset will
be chosen.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 8 ++++++++
drivers/gpu/drm/amd/amdgpu/nv.c | 9 ++++++---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 +-
4 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 0682a270c17b..01b14237dc94 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -196,6 +196,7 @@ static const bool debug_evictions; /* = false */
#endif
extern int amdgpu_tmz;
+extern int amdgpu_mode1_reset;
#ifdef CONFIG_DRM_AMDGPU_SI
extern int amdgpu_si_support;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 94c83a9d4987..d30d31aead7f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -154,6 +154,7 @@ int amdgpu_mes = 0;
int amdgpu_noretry = 1;
int amdgpu_force_asic_type = -1;
int amdgpu_tmz = 0;
+int amdgpu_mode1_reset = 0;
struct amdgpu_mgpu_info mgpu_info = {
.mutex = __MUTEX_INITIALIZER(mgpu_info.mutex),
@@ -793,6 +794,13 @@ module_param_named(abmlevel, amdgpu_dm_abm_level, uint, 0444);
MODULE_PARM_DESC(tmz, "Enable TMZ feature (-1 = auto, 0 = off (default), 1 = on)");
module_param_named(tmz, amdgpu_tmz, int, 0444);
+/**
+ * DOC: mode1_reset (int)
+ * Enable SMU mode1 reset (0 = disabled (default), 1 = enabled)
+ */
+MODULE_PARM_DESC(mode1_reset, "Enable SMU mode1 reset (0 = disabled (default), 1 = enabled)");
+module_param_named(mode1_reset, amdgpu_mode1_reset, int, 0444);
+
static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_AMDGPU_SI
{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index abccb155b28e..11a662a2f8d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -316,10 +316,13 @@ nv_asic_reset_method(struct amdgpu_device *adev)
{
struct smu_context *smu = &adev->smu;
- if (smu_baco_is_support(smu))
- return AMD_RESET_METHOD_BACO;
- else if (smu_mode1_reset_is_support(smu))
+ /**
+ * If mode1 reset is support&enabled, choose mode1 reset
+ */
+ if (smu_mode1_reset_is_support(smu))
return AMD_RESET_METHOD_MODE1;
+ else if (smu_baco_is_support(smu))
+ return AMD_RESET_METHOD_BACO;
else
return AMD_RESET_METHOD_PSP_MODE1;
}
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index cae5aa792ac4..ee74f0cf6231 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -2741,7 +2741,7 @@ bool smu_mode1_reset_is_support(struct smu_context *smu)
{
bool ret = false;
- if (!smu->pm_enabled)
+ if (!smu->pm_enabled || !amdgpu_mode1_reset)
return false;
mutex_lock(&smu->mutex);
--
2.17.1
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next prev parent reply other threads:[~2020-07-10 5:46 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-10 5:46 [PATCH 1/4] drm/amd/powerplay: add SMU mode1 reset Wenhui Sheng
2020-07-10 5:46 ` [PATCH 2/4] drm/amdgpu: add psp mode1 reset mode Wenhui Sheng
2020-07-10 6:35 ` Zhang, Hawking
2020-07-10 6:52 ` Sheng, Wenhui
2020-07-10 8:07 ` Zhang, Hawking
2020-07-10 8:26 ` Sheng, Wenhui
2020-07-10 5:46 ` [PATCH 3/4] drm/amdgpu: enable mode1 reset Wenhui Sheng
2020-07-10 5:46 ` Wenhui Sheng [this message]
2020-07-10 6:37 ` [PATCH 4/4] drm/amdgpu: add mode1 reset module parameter Zhang, Hawking
2020-07-10 6:41 ` [PATCH 1/4] drm/amd/powerplay: add SMU mode1 reset Zhang, Hawking
2020-07-10 6:50 ` Zhang, Hawking
2020-07-10 6:56 ` Sheng, Wenhui
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