From: Changfeng <Changfeng.Zhu@amd.com>
To: amd-gfx@lists.freedesktop.org, Ray.Huang@amd.com
Cc: changzhu <Changfeng.Zhu@amd.com>
Subject: [PATCH] drm/amdgpu: modify cp_flags to pg_flags in gfx_v10_cntl_power_gating
Date: Fri, 9 Oct 2020 12:46:52 +0800 [thread overview]
Message-ID: <20201009044652.10149-1-Changfeng.Zhu@amd.com> (raw)
From: changzhu <Changfeng.Zhu@amd.com>
From: Changfeng <Changfeng.Zhu@amd.com>
It needs to use adev->pg_flags other than adev->cg_glags in
gfx_v10_cntl_power_gating
Change-Id: I5f64ee94d8e574293622aa5e496fe245fda17206
Signed-off-by: Changfeng <Changfeng.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 9a8d3f7b7b15..32360023e8eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -7588,7 +7588,7 @@ static void gfx_v10_cntl_power_gating(struct amdgpu_device *adev, bool enable)
{
u32 data = RREG32_SOC15(GC, 0, mmRLC_PG_CNTL);
- if (enable && (adev->cg_flags & AMD_PG_SUPPORT_GFX_PG))
+ if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG))
data |= RLC_PG_CNTL__GFX_POWER_GATING_ENABLE_MASK;
else
data &= ~RLC_PG_CNTL__GFX_POWER_GATING_ENABLE_MASK;
--
2.17.1
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next reply other threads:[~2020-10-09 4:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-09 4:46 Changfeng [this message]
2020-10-09 4:50 ` [PATCH] drm/amdgpu: modify cp_flags to pg_flags in gfx_v10_cntl_power_gating Huang Rui
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