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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" New SMC message was introduced for gpo control on sienna cichlid. Change-Id: I6f09ae96e9dd7a290c9975564740f597a08ff2fa Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/pm/inc/smu_types.h | 1 + .../gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h | 4 +- .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 42 ++++++++++++++----- 3 files changed, 36 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h b/drivers/gpu/drm/amd/pm/inc/smu_types.h index 745b04730428..c79ad184503e 100644 --- a/drivers/gpu/drm/amd/pm/inc/smu_types.h +++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h @@ -209,6 +209,7 @@ __SMU_DUMMY_MAP(SetSoftMinCclk), \ __SMU_DUMMY_MAP(SetSoftMaxCclk), \ __SMU_DUMMY_MAP(SetGpoFeaturePMask), \ + __SMU_DUMMY_MAP(DisallowGpo), \ #undef __SMU_DUMMY_MAP #define __SMU_DUMMY_MAP(type) SMU_MSG_##type diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h index 35dd6072cc45..dad2832ff3b1 100644 --- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h +++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0_7_ppsmc.h @@ -134,6 +134,8 @@ #define PPSMC_MSG_SetGpoFeaturePMask 0x45 #define PPSMC_MSG_SetSMBUSInterrupt 0x46 -#define PPSMC_Message_Count 0x47 +#define PPSMC_MSG_DisallowGpo 0x56 + +#define PPSMC_Message_Count 0x58 #endif diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c index 822ddfc42360..7e8aa5f7c0c9 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c @@ -128,6 +128,7 @@ static struct cmn2asic_msg_mapping sienna_cichlid_message_map[SMU_MSG_MAX_COUNT] MSG_MAP(Mode1Reset, PPSMC_MSG_Mode1Reset, 0), MSG_MAP(SetMGpuFanBoostLimitRpm, PPSMC_MSG_SetMGpuFanBoostLimitRpm, 0), MSG_MAP(SetGpoFeaturePMask, PPSMC_MSG_SetGpoFeaturePMask, 0), + MSG_MAP(DisallowGpo, PPSMC_MSG_DisallowGpo, 0), }; static struct cmn2asic_mapping sienna_cichlid_clk_map[SMU_CLK_COUNT] = { @@ -3207,19 +3208,40 @@ static int sienna_cichlid_enable_mgpu_fan_boost(struct smu_context *smu) static int sienna_cichlid_gpo_control(struct smu_context *smu, bool enablement) { + uint32_t smu_version; int ret = 0; + if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DPM_GFX_GPO_BIT)) { - if (enablement) - ret = smu_cmn_send_smc_msg_with_param(smu, - SMU_MSG_SetGpoFeaturePMask, - GFX_GPO_PACE_MASK | GFX_GPO_DEM_MASK, - NULL); - else - ret = smu_cmn_send_smc_msg_with_param(smu, - SMU_MSG_SetGpoFeaturePMask, - 0, - NULL); + ret = smu_cmn_get_smc_version(smu, NULL, &smu_version); + if (ret) + return ret; + + if (enablement) { + if (smu_version < 0x003a2500) { + ret = smu_cmn_send_smc_msg_with_param(smu, + SMU_MSG_SetGpoFeaturePMask, + GFX_GPO_PACE_MASK | GFX_GPO_DEM_MASK, + NULL); + } else { + ret = smu_cmn_send_smc_msg_with_param(smu, + SMU_MSG_DisallowGpo, + 0, + NULL); + } + } else { + if (smu_version < 0x003a2500) { + ret = smu_cmn_send_smc_msg_with_param(smu, + SMU_MSG_SetGpoFeaturePMask, + 0, + NULL); + } else { + ret = smu_cmn_send_smc_msg_with_param(smu, + SMU_MSG_DisallowGpo, + 1, + NULL); + } + } } return ret; -- 2.29.0 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx