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From: Hawking Zhang <Hawking.Zhang@amd.com>
To: amd-gfx@lists.freedesktop.org, "Feifei Xu" <Feifei.Xu@amd.com>,
	"Christian König" <christian.koenig@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Subject: [PATCH 1/3] drm/amdgpu: enable software ih ring for vega20 ih block
Date: Mon, 21 Dec 2020 13:42:42 +0800	[thread overview]
Message-ID: <20201221054244.7421-1-Hawking.Zhang@amd.com> (raw)

software ih ring will be used as a workaround
in case hardware ih ring 1 and ring 2 don't work

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
index 4c7bbd0b63c6..a1d4d67d5ee1 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c
@@ -357,6 +357,9 @@ static int vega20_ih_irq_init(struct amdgpu_device *adev)
 	if (ret)
 		return ret;
 
+	if (adev->irq.ih_soft.ring_size)
+		adev->irq.ih_soft.enabled = true;
+
 	return 0;
 }
 
@@ -554,6 +557,10 @@ static int vega20_ih_sw_init(void *handle)
 	/* initialize ih control registers offset */
 	vega20_ih_init_register_offset(adev);
 
+	r = amdgpu_ih_ring_init(adev, &adev->irq.ih_soft, PAGE_SIZE, true);
+	if (r)
+		return r;
+
 	r = amdgpu_irq_init(adev);
 
 	return r;
-- 
2.17.1

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             reply	other threads:[~2020-12-21  5:43 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-21  5:42 Hawking Zhang [this message]
2020-12-21  5:42 ` [PATCH 2/3] drm/amdgpu: set ih soft ring enabled flag for vega and navi Hawking Zhang
2020-12-21  5:42 ` [PATCH 3/3] drm/amdgpu: de-initialize software ih ring Hawking Zhang
2020-12-21  6:43   ` Xu, Feifei

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