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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" v2: add comment to highlight assignment that changes uint32_t value to int fix errors flagged by checkpatch.pl New Functions smu_get_baco_capability() - Implement Powerplay API get_asic_baco_capability smu_baco_set_state() - Implement Powerplay API set_asic_baco_state Modified Functions smu_read_sensor() - modifed signature to match Powerplay API read_sensor Other Changes added 3 above smu Powerplay functions to swsmu_dpm_funcs removed special smu handling in 5 dpm functions and called through Powerplay API Signed-off-by: Darren Powell Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 86 ++++++++--------------- drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 7 +- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 72 +++++++++++++++++-- 3 files changed, 100 insertions(+), 65 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c index df5e7b573428..8ae2df82addc 100644 --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c @@ -1019,18 +1019,13 @@ int amdgpu_dpm_baco_enter(struct amdgpu_device *adev) { const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; void *pp_handle = adev->powerplay.pp_handle; - struct smu_context *smu = &adev->smu; int ret = 0; - if (is_support_sw_smu(adev)) { - ret = smu_baco_enter(smu); - } else { - if (!pp_funcs || !pp_funcs->set_asic_baco_state) - return -ENOENT; + if (!pp_funcs || !pp_funcs->set_asic_baco_state) + return -ENOENT; - /* enter BACO state */ - ret = pp_funcs->set_asic_baco_state(pp_handle, 1); - } + /* enter BACO state */ + ret = pp_funcs->set_asic_baco_state(pp_handle, 1); return ret; } @@ -1039,18 +1034,13 @@ int amdgpu_dpm_baco_exit(struct amdgpu_device *adev) { const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; void *pp_handle = adev->powerplay.pp_handle; - struct smu_context *smu = &adev->smu; int ret = 0; - if (is_support_sw_smu(adev)) { - ret = smu_baco_exit(smu); - } else { - if (!pp_funcs || !pp_funcs->set_asic_baco_state) - return -ENOENT; + if (!pp_funcs || !pp_funcs->set_asic_baco_state) + return -ENOENT; - /* exit BACO state */ - ret = pp_funcs->set_asic_baco_state(pp_handle, 0); - } + /* exit BACO state */ + ret = pp_funcs->set_asic_baco_state(pp_handle, 0); return ret; } @@ -1074,20 +1064,15 @@ bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev) { const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; void *pp_handle = adev->powerplay.pp_handle; - struct smu_context *smu = &adev->smu; bool baco_cap; - if (is_support_sw_smu(adev)) { - return smu_baco_is_support(smu); - } else { - if (!pp_funcs || !pp_funcs->get_asic_baco_capability) - return false; + if (!pp_funcs || !pp_funcs->get_asic_baco_capability) + return false; - if (pp_funcs->get_asic_baco_capability(pp_handle, &baco_cap)) - return false; + if (pp_funcs->get_asic_baco_capability(pp_handle, &baco_cap)) + return false; - return baco_cap ? true : false; - } + return baco_cap; } int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev) @@ -1105,32 +1090,20 @@ int amdgpu_dpm_baco_reset(struct amdgpu_device *adev) { const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; void *pp_handle = adev->powerplay.pp_handle; - struct smu_context *smu = &adev->smu; int ret = 0; - if (is_support_sw_smu(adev)) { - ret = smu_baco_enter(smu); - if (ret) - return ret; - - ret = smu_baco_exit(smu); - if (ret) - return ret; - } else { - if (!pp_funcs - || !pp_funcs->set_asic_baco_state) - return -ENOENT; + if (!pp_funcs || !pp_funcs->set_asic_baco_state) + return -ENOENT; - /* enter BACO state */ - ret = pp_funcs->set_asic_baco_state(pp_handle, 1); - if (ret) - return ret; + /* enter BACO state */ + ret = pp_funcs->set_asic_baco_state(pp_handle, 1); + if (ret) + return ret; - /* exit BACO state */ - ret = pp_funcs->set_asic_baco_state(pp_handle, 0); - if (ret) - return ret; - } + /* exit BACO state */ + ret = pp_funcs->set_asic_baco_state(pp_handle, 0); + if (ret) + return ret; return 0; } @@ -1272,20 +1245,17 @@ void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor, void *data, uint32_t *size) { + const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; int ret = 0; if (!data || !size) return -EINVAL; - if (is_support_sw_smu(adev)) - ret = smu_read_sensor(&adev->smu, sensor, data, size); - else { - if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor) - ret = adev->powerplay.pp_funcs->read_sensor((adev)->powerplay.pp_handle, + if (pp_funcs && pp_funcs->read_sensor) + ret = pp_funcs->read_sensor((adev)->powerplay.pp_handle, sensor, data, size); - else - ret = -EINVAL; - } + else + ret = -EINVAL; return ret; } diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h index 6c0aa38fccba..1835fce3369e 100644 --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h @@ -1246,9 +1246,7 @@ int smu_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABLE_COMMAND type, long *input, uint32_t size); -int smu_read_sensor(struct smu_context *smu, - enum amd_pp_sensors sensor, - void *data, uint32_t *size); +int smu_read_sensor(void *handle, int sensor, void *data, int *size); int smu_get_power_profile_mode(struct smu_context *smu, char *buf); int smu_set_power_profile_mode(struct smu_context *smu, @@ -1278,11 +1276,14 @@ int smu_set_xgmi_pstate(void *handle, int smu_set_azalia_d3_pme(struct smu_context *smu); bool smu_baco_is_support(struct smu_context *smu); +int smu_get_baco_capability(void *handle, bool *cap); int smu_baco_get_state(struct smu_context *smu, enum smu_baco_state *state); int smu_baco_enter(struct smu_context *smu); int smu_baco_exit(struct smu_context *smu); +int smu_baco_set_state(void *handle, int state); + bool smu_mode1_reset_is_support(struct smu_context *smu); int smu_mode1_reset(struct smu_context *smu); diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index e2b885bd23a3..f88c1d2ab9b8 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -2169,20 +2169,23 @@ int smu_od_edit_dpm_table(struct smu_context *smu, return ret; } -int smu_read_sensor(struct smu_context *smu, - enum amd_pp_sensors sensor, - void *data, uint32_t *size) +int smu_read_sensor(void *handle, int sensor, void *data, int *size_arg) { + struct smu_context *smu = handle; struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; int ret = 0; + uint32_t *size, size_val; if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled) return -EOPNOTSUPP; - if (!data || !size) + if (!data || !size_arg) return -EINVAL; + size_val = *size_arg; + size = &size_val; + mutex_lock(&smu->mutex); if (smu->ppt_funcs->read_sensor) @@ -2227,6 +2230,9 @@ int smu_read_sensor(struct smu_context *smu, unlock: mutex_unlock(&smu->mutex); + // assign uint32_t to int + *size_arg = size_val; + return ret; } @@ -2523,6 +2529,27 @@ bool smu_baco_is_support(struct smu_context *smu) return ret; } +int smu_get_baco_capability(void *handle, bool *cap) +{ + struct smu_context *smu = handle; + int ret = 0; + + *cap = false; + + if (!smu->pm_enabled) + return 0; + + mutex_lock(&smu->mutex); + + if (smu->ppt_funcs && smu->ppt_funcs->baco_is_support) + *cap = smu->ppt_funcs->baco_is_support(smu); + + mutex_unlock(&smu->mutex); + + return ret; +} + + int smu_baco_get_state(struct smu_context *smu, enum smu_baco_state *state) { if (smu->ppt_funcs->baco_get_state) @@ -2575,6 +2602,40 @@ int smu_baco_exit(struct smu_context *smu) return ret; } +int smu_baco_set_state(void *handle, int state) +{ + struct smu_context *smu = handle; + int ret = 0; + + if (!smu->pm_enabled) + return -EOPNOTSUPP; + + if (state == 0) { + mutex_lock(&smu->mutex); + + if (smu->ppt_funcs->baco_exit) + ret = smu->ppt_funcs->baco_exit(smu); + + mutex_unlock(&smu->mutex); + } else if (state == 1) { + mutex_lock(&smu->mutex); + + if (smu->ppt_funcs->baco_enter) + ret = smu->ppt_funcs->baco_enter(smu); + + mutex_unlock(&smu->mutex); + + } else { + return -EINVAL; + } + + if (ret) + dev_err(smu->adev->dev, "Failed to %s BACO state!\n", + (state)?"enter":"exit"); + + return ret; +} + bool smu_mode1_reset_is_support(struct smu_context *smu) { bool ret = false; @@ -2759,6 +2820,7 @@ static const struct amd_pm_funcs swsmu_pm_funcs = { .get_fan_control_mode = smu_get_fan_control_mode, .set_fan_speed_percent = smu_set_fan_speed_percent, .get_fan_speed_percent = smu_get_fan_speed_percent, + .read_sensor = smu_read_sensor, .get_performance_level = smu_get_performance_level, .get_current_power_state = smu_get_current_power_state, .get_fan_speed_rpm = smu_get_fan_speed_rpm, @@ -2771,6 +2833,8 @@ static const struct amd_pm_funcs swsmu_pm_funcs = { .set_mp1_state = smu_set_mp1_state, /* export to DC */ .enable_mgpu_fan_boost = smu_enable_mgpu_fan_boost, + .get_asic_baco_capability = smu_get_baco_capability, + .set_asic_baco_state = smu_baco_set_state, .get_ppfeature_status = smu_sys_get_pp_feature_mask, .set_ppfeature_status = smu_sys_set_pp_feature_mask, .asic_reset_mode_2 = smu_mode2_reset, -- 2.25.1 _______________________________________________ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx