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From: Wayne Lin <Wayne.Lin@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Aric Cyr <aric.cyr@amd.com>,
	Eryk.Brol@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
	Qingqing.Zhuo@amd.com, Rodrigo.Siqueira@amd.com,
	Anson.Jacob@amd.com, Aurabindo.Pillai@amd.com,
	Bhawanpreet.Lakha@amd.com, bindu.r@amd.com
Subject: [PATCH 02/14] dc: Revert commit "treat memory as a single-channel"
Date: Thu, 29 Apr 2021 15:51:54 +0800	[thread overview]
Message-ID: <20210429075206.15974-3-Wayne.Lin@amd.com> (raw)
In-Reply-To: <20210429075206.15974-1-Wayne.Lin@amd.com>

From: Aric Cyr <aric.cyr@amd.com>

This reverts commit "dc: treat memory as a single-channel for
asymmetric memory".

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Wayne Lin <Wayne.Lin@amd.com>
---
 .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 48 +------------------
 drivers/gpu/drm/amd/display/dc/dc.h           |  2 -
 2 files changed, 2 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index 49d19fdd750b..887a54246bde 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -761,43 +761,6 @@ static struct wm_table ddr4_wm_table_rn = {
 	}
 };
 
-static struct wm_table ddr4_1R_wm_table_rn = {
-	.entries = {
-		{
-			.wm_inst = WM_A,
-			.wm_type = WM_TYPE_PSTATE_CHG,
-			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 13.90,
-			.sr_enter_plus_exit_time_us = 14.80,
-			.valid = true,
-		},
-		{
-			.wm_inst = WM_B,
-			.wm_type = WM_TYPE_PSTATE_CHG,
-			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 13.90,
-			.sr_enter_plus_exit_time_us = 14.80,
-			.valid = true,
-		},
-		{
-			.wm_inst = WM_C,
-			.wm_type = WM_TYPE_PSTATE_CHG,
-			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 13.90,
-			.sr_enter_plus_exit_time_us = 14.80,
-			.valid = true,
-		},
-		{
-			.wm_inst = WM_D,
-			.wm_type = WM_TYPE_PSTATE_CHG,
-			.pstate_latency_us = 11.72,
-			.sr_exit_time_us = 13.90,
-			.sr_enter_plus_exit_time_us = 14.80,
-			.valid = true,
-		},
-	}
-};
-
 static struct wm_table lpddr4_wm_table_rn = {
 	.entries = {
 		{
@@ -982,12 +945,8 @@ void rn_clk_mgr_construct(
 		} else {
 			if (is_green_sardine)
 				rn_bw_params.wm_table = ddr4_wm_table_gs;
-			else {
-				if (ctx->dc->config.is_single_rank_dimm)
-					rn_bw_params.wm_table = ddr4_1R_wm_table_rn;
-				else
-					rn_bw_params.wm_table = ddr4_wm_table_rn;
-			}
+			else
+				rn_bw_params.wm_table = ddr4_wm_table_rn;
 		}
 		/* Saved clocks configured at boot for debug purposes */
 		rn_dump_clk_registers(&clk_mgr->base.boot_snapshot, &clk_mgr->base, &log_info);
@@ -1005,9 +964,6 @@ void rn_clk_mgr_construct(
 		if (status == PP_SMU_RESULT_OK &&
 		    ctx->dc_bios && ctx->dc_bios->integrated_info) {
 			rn_clk_mgr_helper_populate_bw_params (clk_mgr->base.bw_params, &clock_table, ctx->dc_bios->integrated_info);
-			/* treat memory config as single channel if memory is asymmetrics. */
-			if (ctx->dc->config.is_asymmetric_memory)
-				clk_mgr->base.bw_params->num_channels = 1;
 		}
 	}
 
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index dba2584e8986..6ef1dcadd454 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -308,8 +308,6 @@ struct dc_config {
 #endif
 	uint64_t vblank_alignment_dto_params;
 	uint8_t  vblank_alignment_max_frame_time_diff;
-	bool is_asymmetric_memory;
-	bool is_single_rank_dimm;
 };
 
 enum visual_confirm {
-- 
2.17.1

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  parent reply	other threads:[~2021-04-29  7:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-29  7:51 [PATCH 00/14] DC Patches May 03, 2021 Wayne Lin
2021-04-29  7:51 ` [PATCH 01/14] drm/amd/display: multi-eDP backlight support Wayne Lin
2021-04-29  7:51 ` Wayne Lin [this message]
2021-04-29  7:51 ` [PATCH 03/14] drm/amd/display: fix potential gpu reset deadlock Wayne Lin
2021-04-29  7:51 ` [PATCH 04/14] drm/amd/display: Extend DMUB HW params to allow DM to specify boot options Wayne Lin
2021-04-29  7:51 ` [PATCH 05/14] drm/amd/display: update DCN to use new surface programming Wayne Lin
2021-04-29  7:51 ` [PATCH 06/14] drm/amd/display: Support for DMUB AUX Wayne Lin
2021-04-29  7:51 ` [PATCH 07/14] drm/amd/display: Add audio support for DFP type of active branch is DP case Wayne Lin
2021-04-29  7:52 ` [PATCH 08/14] drm/amd/display: remove checking sink in is_timing_changed Wayne Lin
2021-04-29  7:52 ` [PATCH 09/14] drm/amd/display: add dsc stream overhead for dp only Wayne Lin
2021-04-29  7:52 ` [PATCH 10/14] drm/amd/display: Filter out YCbCr420 timing if VSC SDP not supported Wayne Lin
2021-04-29  7:52 ` [PATCH 11/14] drm/amd/display: Set stream_count to 0 when dc_resource_state_destruct Wayne Lin
2021-04-29  7:52 ` [PATCH 12/14] drm/amd/display: Avoid gpio conflict on MST branch Wayne Lin
2021-04-29  7:52 ` [PATCH 13/14] drm/amd/display: [FW Promotion] Release 0.0.64 Wayne Lin
2021-04-29  7:52 ` [PATCH 14/14] drm/amd/display: 3.2.134 Wayne Lin
2021-04-30 19:49 ` [PATCH 00/14] DC Patches May 03, 2021 Wheeler, Daniel

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