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Wed, 8 Sep 2021 05:46:22 +0000 Received: from pp-server-two.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Wed, 8 Sep 2021 00:46:19 -0500 From: xinhui pan To: CC: , , xinhui pan Subject: [RFC PATCH 2/2] drm/amdgpu: IPs use IB test dedicated BO Date: Wed, 8 Sep 2021 13:45:53 +0800 Message-ID: <20210908054553.3290-2-xinhui.pan@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210908054553.3290-1-xinhui.pan@amd.com> References: <20210908054553.3290-1-xinhui.pan@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d3c41a09-72a4-46df-7f77-08d9728bfd13 X-MS-TrafficTypeDiagnostic: BN6PR1201MB0084: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:983; 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CAT:NONE; SFS:(4636009)(36840700001)(46966006)(6916009)(508600001)(36756003)(426003)(316002)(356005)(83380400001)(2906002)(30864003)(16526019)(8676002)(1076003)(26005)(186003)(81166007)(82310400003)(336012)(54906003)(6666004)(86362001)(2616005)(47076005)(8936002)(4326008)(7696005)(70586007)(70206006)(5660300002)(36860700001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2021 05:46:22.1140 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d3c41a09-72a4-46df-7f77-08d9728bfd13 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT062.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR1201MB0084 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Let vce/uvd/vcn use it to avoid memory allocation during IB test. This is useful when memory is nearly used up and no BO can be evicted/swappout. Signed-off-by: xinhui pan --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 51 ++++------- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 9 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 113 ++++++++++++------------ drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 10 +-- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 10 +-- 5 files changed, 89 insertions(+), 104 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c index d451c359606a..573ab1d69bd7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c @@ -1080,23 +1080,10 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, unsigned offset_idx = 0; unsigned offset[3] = { UVD_BASE_SI, 0, 0 }; - amdgpu_bo_kunmap(bo); - amdgpu_bo_unpin(bo); - - if (!ring->adev->uvd.address_64_bit) { - struct ttm_operation_ctx ctx = { true, false }; - - amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); - amdgpu_uvd_force_into_uvd_segment(bo); - r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); - if (r) - goto err; - } - r = amdgpu_job_alloc_with_ib(adev, 64, direct ? AMDGPU_IB_POOL_DIRECT : AMDGPU_IB_POOL_DELAYED, &job); if (r) - goto err; + return r; if (adev->asic_type >= CHIP_VEGA10) { offset_idx = 1 + ring->me; @@ -1148,8 +1135,6 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, } amdgpu_bo_fence(bo, f, false); - amdgpu_bo_unreserve(bo); - amdgpu_bo_unref(&bo); if (fence) *fence = dma_fence_get(f); @@ -1159,10 +1144,6 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo, err_free: amdgpu_job_free(job); - -err: - amdgpu_bo_unreserve(bo); - amdgpu_bo_unref(&bo); return r; } @@ -1177,11 +1158,12 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, uint32_t *msg; int r, i; - r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_GTT, - &bo, NULL, (void **)&msg); - if (r) - return r; + if (!ring->adev->uvd.address_64_bit) + bo = adev->ib_test_vram_bo; + else + bo = adev->ib_test_gtt_bo; + amdgpu_bo_reserve(bo, true); + msg = amdgpu_bo_kptr(bo); /* stitch together an UVD create msg */ msg[0] = cpu_to_le32(0x00000de4); @@ -1198,7 +1180,9 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, for (i = 11; i < 1024; ++i) msg[i] = cpu_to_le32(0x0); - return amdgpu_uvd_send_msg(ring, bo, true, fence); + r = amdgpu_uvd_send_msg(ring, bo, true, fence); + amdgpu_bo_unreserve(bo); + return r; } int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, @@ -1209,11 +1193,12 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, uint32_t *msg; int r, i; - r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_GTT, - &bo, NULL, (void **)&msg); - if (r) - return r; + if (!ring->adev->uvd.address_64_bit) + bo = adev->ib_test_vram_bo; + else + bo = adev->ib_test_gtt_bo; + amdgpu_bo_reserve(bo, true); + msg = amdgpu_bo_kptr(bo); /* stitch together an UVD destroy msg */ msg[0] = cpu_to_le32(0x00000de4); @@ -1223,7 +1208,9 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, for (i = 4; i < 1024; ++i) msg[i] = cpu_to_le32(0x0); - return amdgpu_uvd_send_msg(ring, bo, direct, fence); + r = amdgpu_uvd_send_msg(ring, bo, direct, fence); + amdgpu_bo_unreserve(bo); + return r; } static void amdgpu_uvd_idle_work_handler(struct work_struct *work) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c index e9fdf49d69e8..70af6afbbbb6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c @@ -1141,11 +1141,11 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout) if (ring != &ring->adev->vce.ring[0]) return 0; - r = amdgpu_bo_create_reserved(ring->adev, 512, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_VRAM, - &bo, NULL, NULL); + bo = ring->adev->ib_test_vram_bo; + amdgpu_bo_reserve(bo, true); + r = ttm_bo_wait(&bo->tbo, false, false); if (r) - return r; + goto error; r = amdgpu_vce_get_create_msg(ring, 1, bo, NULL); if (r) @@ -1164,7 +1164,6 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout) error: dma_fence_put(fence); amdgpu_bo_unreserve(bo); - amdgpu_bo_free_kernel(&bo, NULL, NULL); return r; } diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c index 561296a85b43..b150d5a5db73 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c @@ -577,8 +577,6 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, goto err_free; amdgpu_bo_fence(bo, f, false); - amdgpu_bo_unreserve(bo); - amdgpu_bo_free_kernel(&bo, NULL, (void **)&msg); if (fence) *fence = dma_fence_get(f); @@ -588,26 +586,15 @@ static int amdgpu_vcn_dec_send_msg(struct amdgpu_ring *ring, err_free: amdgpu_job_free(job); - err: - amdgpu_bo_unreserve(bo); - amdgpu_bo_free_kernel(&bo, NULL, (void **)&msg); return r; } -static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, - struct amdgpu_bo **bo) +static void amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, + struct amdgpu_bo *bo) { - struct amdgpu_device *adev = ring->adev; - uint32_t *msg; - int r, i; - - *bo = NULL; - r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_VRAM, - bo, NULL, (void **)&msg); - if (r) - return r; + uint32_t *msg = amdgpu_bo_kptr(bo); + int i; msg[0] = cpu_to_le32(0x00000028); msg[1] = cpu_to_le32(0x00000038); @@ -625,23 +612,13 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand msg[13] = cpu_to_le32(0x00000440); for (i = 14; i < 1024; ++i) msg[i] = cpu_to_le32(0x0); - - return 0; } -static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, - struct amdgpu_bo **bo) +static void amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, + struct amdgpu_bo *bo) { - struct amdgpu_device *adev = ring->adev; - uint32_t *msg; - int r, i; - - *bo = NULL; - r = amdgpu_bo_create_reserved(adev, 1024, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_VRAM, - bo, NULL, (void **)&msg); - if (r) - return r; + uint32_t *msg = amdgpu_bo_kptr(bo); + int i; msg[0] = cpu_to_le32(0x00000028); msg[1] = cpu_to_le32(0x00000018); @@ -651,8 +628,6 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han msg[5] = cpu_to_le32(0x00000000); for (i = 6; i < 1024; ++i) msg[i] = cpu_to_le32(0x0); - - return 0; } int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout) @@ -661,17 +636,29 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout) struct amdgpu_bo *bo; long r; - r = amdgpu_vcn_dec_get_create_msg(ring, 1, &bo); + bo = ring->adev->ib_test_vram_bo; + amdgpu_bo_reserve(bo, true); + r = ttm_bo_wait(&bo->tbo, false, false); if (r) goto error; - r = amdgpu_vcn_dec_send_msg(ring, bo, NULL); + amdgpu_vcn_dec_get_create_msg(ring, 1, bo); + + r = amdgpu_vcn_dec_send_msg(ring, bo, &fence); if (r) goto error; - r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, &bo); - if (r) + + r = dma_fence_wait_timeout(fence, false, timeout); + if (r == 0) + r = -ETIMEDOUT; + if (r < 0) goto error; + dma_fence_put(fence); + fence = NULL; + + amdgpu_vcn_dec_get_destroy_msg(ring, 1, bo); + r = amdgpu_vcn_dec_send_msg(ring, bo, &fence); if (r) goto error; @@ -681,9 +668,9 @@ int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout) r = -ETIMEDOUT; else if (r > 0) r = 0; - - dma_fence_put(fence); error: + dma_fence_put(fence); + amdgpu_bo_unreserve(bo); return r; } @@ -727,8 +714,6 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring, goto err_free; amdgpu_bo_fence(bo, f, false); - amdgpu_bo_unreserve(bo); - amdgpu_bo_unref(&bo); if (fence) *fence = dma_fence_get(f); @@ -738,10 +723,7 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring, err_free: amdgpu_job_free(job); - err: - amdgpu_bo_unreserve(bo); - amdgpu_bo_unref(&bo); return r; } @@ -751,17 +733,29 @@ int amdgpu_vcn_dec_sw_ring_test_ib(struct amdgpu_ring *ring, long timeout) struct amdgpu_bo *bo; long r; - r = amdgpu_vcn_dec_get_create_msg(ring, 1, &bo); + bo = ring->adev->ib_test_vram_bo; + amdgpu_bo_reserve(bo, true); + r = ttm_bo_wait(&bo->tbo, false, false); if (r) goto error; - r = amdgpu_vcn_dec_sw_send_msg(ring, bo, NULL); + amdgpu_vcn_dec_get_create_msg(ring, 1, bo); + + r = amdgpu_vcn_dec_sw_send_msg(ring, bo, &fence); if (r) goto error; - r = amdgpu_vcn_dec_get_destroy_msg(ring, 1, &bo); - if (r) + + r = dma_fence_wait_timeout(fence, false, timeout); + if (r == 0) + r = -ETIMEDOUT; + if (r < 0) goto error; + dma_fence_put(fence); + fence = NULL; + + amdgpu_vcn_dec_get_destroy_msg(ring, 1, bo); + r = amdgpu_vcn_dec_sw_send_msg(ring, bo, &fence); if (r) goto error; @@ -772,8 +766,9 @@ int amdgpu_vcn_dec_sw_ring_test_ib(struct amdgpu_ring *ring, long timeout) else if (r > 0) r = 0; - dma_fence_put(fence); error: + dma_fence_put(fence); + amdgpu_bo_unreserve(bo); return r; } @@ -922,16 +917,25 @@ int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) struct amdgpu_bo *bo = NULL; long r; - r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_VRAM, - &bo, NULL, NULL); + bo = ring->adev->ib_test_vram_bo; + amdgpu_bo_reserve(bo, true); + r = ttm_bo_wait(&bo->tbo, false, false); if (r) - return r; + goto error; - r = amdgpu_vcn_enc_get_create_msg(ring, 1, bo, NULL); + r = amdgpu_vcn_enc_get_create_msg(ring, 1, bo, &fence); if (r) goto error; + r = dma_fence_wait_timeout(fence, false, timeout); + if (r == 0) + r = -ETIMEDOUT; + if (r < 0) + goto error; + + dma_fence_put(fence); + fence = NULL; + r = amdgpu_vcn_enc_get_destroy_msg(ring, 1, bo, &fence); if (r) goto error; @@ -945,7 +949,6 @@ int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) error: dma_fence_put(fence); amdgpu_bo_unreserve(bo); - amdgpu_bo_free_kernel(&bo, NULL, NULL); return r; } diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c index bc571833632e..0ce8fcc318d3 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c @@ -335,11 +335,11 @@ static int uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) struct amdgpu_bo *bo = NULL; long r; - r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_VRAM, - &bo, NULL, NULL); + bo = ring->adev->ib_test_vram_bo; + amdgpu_bo_reserve(bo, true); + r = ttm_bo_wait(&bo->tbo, false, false); if (r) - return r; + goto error; r = uvd_v6_0_enc_get_create_msg(ring, 1, bo, NULL); if (r) @@ -357,9 +357,7 @@ static int uvd_v6_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) error: dma_fence_put(fence); - amdgpu_bo_unpin(bo); amdgpu_bo_unreserve(bo); - amdgpu_bo_unref(&bo); return r; } diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c index b6e82d75561f..6d26c80df960 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c @@ -341,11 +341,11 @@ static int uvd_v7_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) struct amdgpu_bo *bo = NULL; long r; - r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE, - AMDGPU_GEM_DOMAIN_VRAM, - &bo, NULL, NULL); + bo = ring->adev->ib_test_vram_bo; + amdgpu_bo_reserve(bo, true); + r = ttm_bo_wait(&bo->tbo, false, false); if (r) - return r; + goto error; r = uvd_v7_0_enc_get_create_msg(ring, 1, bo, NULL); if (r) @@ -363,9 +363,7 @@ static int uvd_v7_0_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout) error: dma_fence_put(fence); - amdgpu_bo_unpin(bo); amdgpu_bo_unreserve(bo); - amdgpu_bo_unref(&bo); return r; } -- 2.25.1