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From: Huang Rui <ray.huang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Felix Kuehling <Felix.Kuehling@amd.com>,
	Sean Keely <Sean.Keely@amd.com>,
	 Alex Deucher <alexander.deucher@amd.com>,
	Lang Yu <Lang.Yu@amd.com>, "Chen Gong" <Curry.Gong@amd.com>,
	Huang Rui <ray.huang@amd.com>
Subject: [PATCH 2/2] drm/amdgpu: update shader array golden setting for cyan_skillfish
Date: Thu, 23 Sep 2021 13:42:01 +0800	[thread overview]
Message-ID: <20210923054201.1433036-2-ray.huang@amd.com> (raw)
In-Reply-To: <20210923054201.1433036-1-ray.huang@amd.com>

Update golden setting to enable full compute units for cyan_skillfish.

Signed-off-by: Huang Rui <ray.huang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 16dbe593cba2..5f9382d61234 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -3573,7 +3573,8 @@ static const struct soc15_reg_golden golden_settings_gc_10_0_cyan_skillfish[] =
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_ARB_CONFIG, 0x00000100, 0x00000130),
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmSQ_LDS_CLK_CTRL, 0xffffffff, 0xffffffff),
 	SOC15_REG_GOLDEN_VALUE(GC, 0, mmTA_CNTL_AUX, 0x00030008, 0x01030000),
-	SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00800000, 0x00800000)
+	SOC15_REG_GOLDEN_VALUE(GC, 0, mmUTCL1_CTRL, 0x00800000, 0x00800000),
+	SOC15_REG_GOLDEN_VALUE(GC, 0, mmCC_GC_SHADER_ARRAY_CONFIG, 0xffff0000, 0xffe00000)
 };
 
 #define DEFAULT_SH_MEM_CONFIG \
-- 
2.25.1


  reply	other threads:[~2021-09-23  5:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-23  5:42 [PATCH 1/2] drm/amdgpu: fix to use real compute unit number for shader array mask Huang Rui
2021-09-23  5:42 ` Huang Rui [this message]
2021-09-23  5:47 ` Keely, Sean

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