From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: "Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>
Subject: [PATCH 25/64] drm/amdgpu/navi10_ppt: convert to IP version checking
Date: Tue, 28 Sep 2021 12:41:58 -0400 [thread overview]
Message-ID: <20210928164237.833132-26-alexander.deucher@amd.com> (raw)
In-Reply-To: <20210928164237.833132-1-alexander.deucher@amd.com>
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 50 +++++++++----------
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index ae11f5ed7a97..d96f904a765b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -345,7 +345,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
/* DPM UCLK enablement should be skipped for navi10 A0 secure board */
if (!(is_asic_secure(smu) &&
- (adev->asic_type == CHIP_NAVI10) &&
+ (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) &&
(adev->rev_id == 0)) &&
(adev->pm.pp_feature & PP_MCLK_DPM_MASK))
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT)
@@ -354,7 +354,7 @@ navi10_get_allowed_feature_mask(struct smu_context *smu,
/* DS SOCCLK enablement should be skipped for navi10 A0 secure board */
if (is_asic_secure(smu) &&
- (adev->asic_type == CHIP_NAVI10) &&
+ (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) &&
(adev->rev_id == 0))
*(uint64_t *)feature_mask &=
~FEATURE_MASK(FEATURE_DS_SOCCLK_BIT);
@@ -925,18 +925,18 @@ static int navi1x_get_smu_metrics_data(struct smu_context *smu,
return ret;
}
- switch (adev->asic_type) {
- case CHIP_NAVI12:
+ switch (adev->ip_versions[MP1_HWIP]) {
+ case IP_VERSION(11, 0, 9):
if (smu_version > 0x00341C00)
ret = navi12_get_smu_metrics_data(smu, member, value);
else
ret = navi12_get_legacy_smu_metrics_data(smu, member, value);
break;
- case CHIP_NAVI10:
- case CHIP_NAVI14:
+ case IP_VERSION(11, 0, 0):
+ case IP_VERSION(11, 0, 5):
default:
- if (((adev->asic_type == CHIP_NAVI14) && smu_version > 0x00351F00) ||
- ((adev->asic_type == CHIP_NAVI10) && smu_version > 0x002A3B00))
+ if (((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5)) && smu_version > 0x00351F00) ||
+ ((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) && smu_version > 0x002A3B00))
ret = navi10_get_smu_metrics_data(smu, member, value);
else
ret = navi10_get_legacy_smu_metrics_data(smu, member, value);
@@ -1509,8 +1509,8 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu)
uint32_t sclk_freq;
pstate_table->gfxclk_pstate.min = gfx_table->min;
- switch (adev->asic_type) {
- case CHIP_NAVI10:
+ switch (adev->ip_versions[MP1_HWIP]) {
+ case IP_VERSION(11, 0, 0):
switch (adev->pdev->revision) {
case 0xf0: /* XTX */
case 0xc0:
@@ -1525,7 +1525,7 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu)
break;
}
break;
- case CHIP_NAVI14:
+ case IP_VERSION(11, 0, 5):
switch (adev->pdev->revision) {
case 0xc7: /* XT */
case 0xf4:
@@ -1548,7 +1548,7 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu)
break;
}
break;
- case CHIP_NAVI12:
+ case IP_VERSION(11, 0, 9):
sclk_freq = NAVI12_UMD_PSTATE_PEAK_GFXCLK;
break;
default:
@@ -2562,8 +2562,8 @@ static bool navi10_need_umc_cdr_workaround(struct smu_context *smu)
if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT))
return false;
- if (adev->asic_type == CHIP_NAVI10 ||
- adev->asic_type == CHIP_NAVI14)
+ if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0) ||
+ adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5))
return true;
return false;
@@ -2671,8 +2671,8 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
* - PPSMC_MSG_SetDriverDummyTableDramAddrLow
* - PPSMC_MSG_GetUMCFWWA
*/
- if (((adev->asic_type == CHIP_NAVI10) && (pmfw_version >= 0x2a3500)) ||
- ((adev->asic_type == CHIP_NAVI14) && (pmfw_version >= 0x351D00))) {
+ if (((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) && (pmfw_version >= 0x2a3500)) ||
+ ((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5)) && (pmfw_version >= 0x351D00))) {
ret = smu_cmn_send_smc_msg_with_param(smu,
SMU_MSG_GET_UMC_FW_WA,
0,
@@ -2691,13 +2691,13 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
return 0;
if (umc_fw_disable_cdr) {
- if (adev->asic_type == CHIP_NAVI10)
+ if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0))
return navi10_umc_hybrid_cdr_workaround(smu);
} else {
return navi10_set_dummy_pstates_table_location(smu);
}
} else {
- if (adev->asic_type == CHIP_NAVI10)
+ if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0))
return navi10_umc_hybrid_cdr_workaround(smu);
}
@@ -3151,18 +3151,18 @@ static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu,
return ret;
}
- switch (adev->asic_type) {
- case CHIP_NAVI12:
+ switch (adev->ip_versions[MP1_HWIP]) {
+ case IP_VERSION(11, 0, 9):
if (smu_version > 0x00341C00)
ret = navi12_get_gpu_metrics(smu, table);
else
ret = navi12_get_legacy_gpu_metrics(smu, table);
break;
- case CHIP_NAVI10:
- case CHIP_NAVI14:
+ case IP_VERSION(11, 0, 0):
+ case IP_VERSION(11, 0, 5):
default:
- if (((adev->asic_type == CHIP_NAVI14) && smu_version > 0x00351F00) ||
- ((adev->asic_type == CHIP_NAVI10) && smu_version > 0x002A3B00))
+ if (((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 5)) && smu_version > 0x00351F00) ||
+ ((adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 0)) && smu_version > 0x002A3B00))
ret = navi10_get_gpu_metrics(smu, table);
else
ret =navi10_get_legacy_gpu_metrics(smu, table);
@@ -3180,7 +3180,7 @@ static int navi10_enable_mgpu_fan_boost(struct smu_context *smu)
uint32_t param = 0;
/* Navi12 does not support this */
- if (adev->asic_type == CHIP_NAVI12)
+ if (adev->ip_versions[MP1_HWIP] == IP_VERSION(11, 0, 9))
return 0;
/*
--
2.31.1
next prev parent reply other threads:[~2021-09-28 16:44 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-28 16:41 [PATCH V2 00/64] Move to IP driven device enumeration Alex Deucher
2021-09-28 16:41 ` [PATCH 01/64] drm/amdgpu: move headless sku check into harvest function Alex Deucher
2021-09-28 16:41 ` [PATCH 02/64] drm/amdgpu: add debugfs access to the IP discovery table Alex Deucher
2021-09-28 16:41 ` [PATCH 03/64] drm/amdgpu: store HW IP versions in the driver structure Alex Deucher
2021-09-28 16:41 ` [PATCH 04/64] drm/amdgpu: fill in IP versions from IP discovery table Alex Deucher
2021-09-28 16:41 ` [PATCH 05/64] drm/amdgpu: add XGMI HWIP Alex Deucher
2021-09-28 16:41 ` [PATCH 06/64] drm/amdgpu/nv: export common IP functions Alex Deucher
2021-09-28 16:41 ` [PATCH 07/64] drm/amdgpu: add initial IP enumeration via IP discovery table Alex Deucher
2021-09-28 16:41 ` [PATCH 08/64] drm/amdgpu/sdma5.0: convert to IP version checking Alex Deucher
2021-09-28 16:41 ` [PATCH 09/64] drm/amdgpu/sdma5.2: " Alex Deucher
2021-09-28 16:41 ` [PATCH 10/64] drm/amdgpu/gfx10: " Alex Deucher
2021-09-28 16:41 ` [PATCH 11/64] drm/amdgpu: filter out radeon PCI device IDs Alex Deucher
2021-09-28 16:41 ` [PATCH 12/64] drm/amdgpu: bind to any 0x1002 PCI diplay class device Alex Deucher
2021-09-28 16:41 ` [PATCH 13/64] drm/amdgpu/gmc10.0: convert to IP version checking Alex Deucher
2021-09-28 16:41 ` [PATCH 14/64] drm/amdgpu: Use IP discovery to drive setting IP blocks by default Alex Deucher
2021-09-28 16:41 ` [PATCH 15/64] drm/amdgpu: drive nav10 from the IP discovery table Alex Deucher
2021-09-28 16:41 ` [PATCH 16/64] drm/amdgpu/gfxhub2.1: convert to IP version checking Alex Deucher
2021-09-28 16:41 ` [PATCH 17/64] drm/amdgpu/mmhub2.0: " Alex Deucher
2021-09-28 16:41 ` [PATCH 18/64] drm/amdgpu/mmhub2.1: " Alex Deucher
2021-09-28 16:41 ` [PATCH 19/64] drm/amdgpu/vcn3.0: " Alex Deucher
2021-09-28 16:41 ` [PATCH 20/64] drm/amdgpu/athub2.0: " Alex Deucher
2021-09-28 16:41 ` [PATCH 21/64] drm/amdgpu/athub2.1: " Alex Deucher
2021-09-28 16:41 ` [PATCH 22/64] drm/amdgpu/navi10_ih: " Alex Deucher
2021-09-28 16:41 ` [PATCH 23/64] drm/amdgpu/amdgpu_smu: " Alex Deucher
2021-09-28 16:41 ` [PATCH 24/64] drm/amdgpu/smu11.0: " Alex Deucher
2021-09-28 16:41 ` Alex Deucher [this message]
2021-09-28 16:41 ` [PATCH 26/64] drm/amdgpu/sienna_cichlid_ppt: " Alex Deucher
2021-09-28 16:42 ` [PATCH 27/64] drm/amdgpu/nv: " Alex Deucher
2021-09-29 9:16 ` Christian König
2021-09-28 16:42 ` [PATCH 28/64] drm/amdgpu: drive all navi asics from the IP discovery table Alex Deucher
2021-10-11 17:20 ` Mike Lothian
2021-10-11 17:35 ` Alex Deucher
2021-10-11 23:16 ` Mike Lothian
2021-09-28 16:42 ` [PATCH 29/64] drm/amdgpu/display/dm: convert to IP version checking Alex Deucher
2021-09-28 16:42 ` [PATCH 30/64] drm/amdgpu: add DCI HWIP Alex Deucher
2021-09-28 16:42 ` [PATCH 31/64] drm/amdgpu/soc15: export common IP functions Alex Deucher
2021-09-29 9:16 ` Christian König
2021-09-28 16:42 ` [PATCH 32/64] drm/amdgpu: add initial IP discovery support for vega based parts Alex Deucher
2021-09-28 16:42 ` [PATCH 33/64] drm/amdgpu/soc15: get rev_id in soc15_common_early_init Alex Deucher
2021-09-28 16:42 ` [PATCH 34/64] drm/amdgpu: drive all vega asics from the IP discovery table Alex Deucher
2021-09-28 16:42 ` [PATCH 35/64] drm/amdgpu: default to true in amdgpu_device_asic_has_dc_support Alex Deucher
2021-09-28 16:42 ` [PATCH 36/64] drm/amdgpu/display/dm: convert RAVEN to IP version checking Alex Deucher
2021-09-28 16:42 ` [PATCH 37/64] drm/amdgpu/sdma4.0: convert " Alex Deucher
2021-09-28 16:42 ` [PATCH 38/64] drm/amdgpu/hdp4.0: " Alex Deucher
2021-09-28 16:42 ` [PATCH 39/64] drm/amdgpu/gfx9.0: " Alex Deucher
2021-09-28 16:42 ` [PATCH 40/64] drm/amdgpu/amdgpu_psp: " Alex Deucher
2021-09-28 16:42 ` [PATCH 41/64] drm/amdgpu/psp_v11.0: " Alex Deucher
2021-09-28 16:42 ` [PATCH 42/64] drm/amdgpu/psp_v13.0: " Alex Deucher
2021-09-28 16:42 ` [PATCH 43/64] drm/amdgpu/pm/smu_v11.0: update " Alex Deucher
2021-09-28 16:42 ` [PATCH 44/64] drm/amdgpu/pm/smu_v13.0: convert " Alex Deucher
2021-09-28 16:42 ` [PATCH 45/64] drm/amdgpu/pm/amdgpu_smu: convert more " Alex Deucher
2021-09-28 16:42 ` [PATCH 46/64] drm/amdgpu/amdgpu_vcn: convert to " Alex Deucher
2021-09-28 16:42 ` [PATCH 47/64] drm/amdgpu/vcn2.5: " Alex Deucher
2021-09-28 16:42 ` [PATCH 48/64] drm/amdgpu/soc15: " Alex Deucher
2021-09-28 16:42 ` [PATCH 49/64] drm/amd/display: fix error case handling Alex Deucher
2021-09-28 16:42 ` [PATCH 50/64] drm/amdgpu: add VCN1 hardware IP Alex Deucher
2021-09-29 9:17 ` Christian König
2021-09-28 16:42 ` [PATCH 51/64] drm/amdgpu: add HWID of SDMA instance 2 and 3 Alex Deucher
2021-09-28 16:42 ` [PATCH 52/64] drm/amdgpu: get VCN and SDMA instances from IP discovery table Alex Deucher
2021-09-29 9:18 ` Christian König
2021-09-28 16:42 ` [PATCH 53/64] drm/amdgpu/sdma: remove manual instance setting Alex Deucher
2021-09-28 16:42 ` [PATCH 54/64] drm/amdgpu/vcn: " Alex Deucher
2021-09-28 16:42 ` [PATCH 55/64] drm/amdgpu: get VCN harvest information from IP discovery table Alex Deucher
2021-09-28 16:42 ` [PATCH 56/64] drm/amdgpu/ucode: add default behavior Alex Deucher
2021-09-28 16:42 ` [PATCH 57/64] drm/amdgpu: add new asic_type for IP discovery Alex Deucher
2021-09-28 16:42 ` [PATCH 58/64] drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default Alex Deucher
2021-09-28 16:42 ` [PATCH 59/64] drm/amdgpu: convert IP version array to include instances Alex Deucher
2021-09-29 9:22 ` Christian König
2021-09-28 16:42 ` [PATCH 60/64] drm/amdgpu: clean up set IP function Alex Deucher
2021-09-28 16:42 ` [PATCH 61/64] drm/amdgpu: add support for SRIOV in IP discovery path Alex Deucher
2021-09-29 9:23 ` Christian König
2021-09-28 16:42 ` [PATCH 62/64] drm/amdkfd: clean up parameters in kgd2kfd_probe Alex Deucher
2021-09-28 16:42 ` [PATCH 63/64] drm/amdkfd: convert kfd_device.c to use GC IP version Alex Deucher
2021-09-28 16:42 ` [PATCH 64/64] drm/amdgpu: add an option to override IP discovery table from a file Alex Deucher
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