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Tue, 5 Oct 2021 03:00:54 -0500 From: Wayne Lin To: CC: , , , , , , , , , Jimmy Kizito , Wayne Lin Subject: [PATCH v2 20/23] drm/amd/display: Fix for access for ddc pin and aux engine Date: Tue, 5 Oct 2021 15:52:02 +0800 Message-ID: <20211005075205.3467938-21-Wayne.Lin@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211005075205.3467938-1-Wayne.Lin@amd.com> References: <20211005075205.3467938-1-Wayne.Lin@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7127ebd3-36fe-4b31-a335-08d987d64a5c X-MS-TrafficTypeDiagnostic: DM5PR12MB2407: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:151; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: x3kYRYe24yMsI+8ZvlNyI5ATcVpy092mnJixAEu4Q+OegKKUWo6MhLE9HF65C9TLr4SyMqAecB0ZyqKHt6U1D7EFQjMJcxtZrT0ynhB8zVHrHrmy1tSk+oaRCrmgnA5Um5TGIcY5dOsqtbmIdAEcTbdHRul2dtSztNNOIIzoIBiO70u2pO43g+3B3EUWG/Hb7R8W6JpFTcVjSWH3CxnrnLUwXvubNbODl+OYLAT8GJBdWAMgP2lbp4sSckLvhHXLbj26OBswLkP+kzFun5hcpC9SPQCx8rrCUqbNynvIul1KjpNddArOJyKrVklovs2QjtNohT02QzOzuBVCxwt3A2kSmzb3r4s1GD62Ive9JHyjpEGUBve7Z09kPVFR8Lu6Tm9UGVcWn8JA4vUaj/HsaCgankLo+3107am83YxXhP1NXG6FUgVd0Z2rs3W0NoqDJnZbBdsxsyVoy4lMnIcpY+VYBO4JGx/5A9Zr7Cq4xbpHVsYNzPxcbRh6T/wIE31rKHWmsqoeu5IPhuphHZSGecNXFG+heQHpVoVFsjefdCflfQtGWQmM/NrhJ+CPuxkIqjm5rfg9sGpMsw1+iayYlzdATLrCPdsaK0afcmMfEv7rNf9sESOblGUPXPKSdd++rOIkoIlZuj7GV1+14NRdtAhLMgXOLxcJkohm6aG6bp8tP+3mf5OmGro7Z/vJ6gUNRkUiLzUv3G0GZCIT+CvgBPo91IrNm/DED0Rul8SuECk= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(4636009)(46966006)(36840700001)(47076005)(6916009)(36756003)(508600001)(81166007)(8936002)(6666004)(54906003)(8676002)(356005)(70206006)(70586007)(86362001)(1076003)(316002)(26005)(186003)(5660300002)(2906002)(36860700001)(4326008)(2616005)(426003)(7696005)(83380400001)(82310400003)(336012)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2021 08:01:08.8514 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7127ebd3-36fe-4b31-a335-08d987d64a5c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2407 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Meenakshikumar Somasundaram [Why & How] Add codes for commit "b693dfe24d61 drm/amd/display: Fix for null pointer access for ddc pin and aux engine" to take USB4 feature into account. Reviewed-by: Jimmy Kizito Acked-by: Wayne Lin Acked-by: Nicholas Kazlauskas Signed-off-by: Meenakshikumar Somasundaram --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 +++--- drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c | 6 +++--- drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 3 +++ drivers/gpu/drm/amd/display/dc/irq_types.h | 5 +---- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 6b5ddf0a29c1..ca5dc3c168ec 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -1709,9 +1709,9 @@ static bool dc_link_construct_dpia(struct dc_link *link, DC_LOGGER_INIT(dc_ctx->logger); - /* Initialized dummy hpd and hpd rx */ - link->irq_source_hpd = DC_IRQ_SOURCE_USB4_DMUB_HPD; - link->irq_source_hpd_rx = DC_IRQ_SOURCE_USB4_DMUB_HPDRX; + /* Initialized irq source for hpd and hpd rx */ + link->irq_source_hpd = DC_IRQ_SOURCE_INVALID; + link->irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID; link->link_status.dpcd_caps = &link->dpcd_caps; link->dc = init_params->dc; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c index ce15a38c2aea..b8b1fa0d4ae3 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c @@ -230,7 +230,7 @@ static enum dc_status dpcd_set_lt_pattern(struct dc_link *link, } status = core_link_write_dpcd(link, - DP_TRAINING_PATTERN_SET, + dpcd_tps_offset, &dpcd_pattern.raw, sizeof(dpcd_pattern.raw)); @@ -788,7 +788,7 @@ static enum dc_status dpcd_clear_lt_pattern(struct dc_link *link, uint32_t hop) ((DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE) * (hop - 1)); status = core_link_write_dpcd(link, - DP_TRAINING_PATTERN_SET, + dpcd_tps_offset, &dpcd_pattern.raw, sizeof(dpcd_pattern.raw)); @@ -898,7 +898,7 @@ enum link_training_result dc_link_dpia_perform_link_training(struct dc_link *lin enum link_training_result result; struct link_training_settings lt_settings; uint8_t repeater_cnt = 0; /* Number of hops/repeaters in display path. */ - uint8_t repeater_id; /* Current hop. */ + int8_t repeater_id; /* Current hop. */ /* Configure link as prescribed in link_setting and set LTTPR mode. */ result = dpia_configure_link(link, link_setting, <_settings); diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c index 5666543f095b..95cb4d7cc76a 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c @@ -627,6 +627,7 @@ int dce_aux_transfer_dmub_raw(struct ddc_service *ddc, #define AUX_MAX_I2C_DEFER_RETRIES 7 #define AUX_MAX_INVALID_REPLY_RETRIES 2 #define AUX_MAX_TIMEOUT_RETRIES 3 +#define AUX_DEFER_DELAY_FOR_DPIA 4 /*ms*/ static void dce_aux_log_payload(const char *payload_name, unsigned char *payload, uint32_t length, uint32_t max_length_to_log) @@ -772,6 +773,8 @@ bool dce_aux_transfer_with_retries(struct ddc_service *ddc, /* polling_timeout_period is in us */ if (aux110) defer_time_in_ms += aux110->polling_timeout_period / 1000; + else + defer_time_in_ms += AUX_DEFER_DELAY_FOR_DPIA; ++aux_defer_retries; fallthrough; case AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER: diff --git a/drivers/gpu/drm/amd/display/dc/irq_types.h b/drivers/gpu/drm/amd/display/dc/irq_types.h index 7a9f667d5edb..530c2578db40 100644 --- a/drivers/gpu/drm/amd/display/dc/irq_types.h +++ b/drivers/gpu/drm/amd/display/dc/irq_types.h @@ -153,10 +153,7 @@ enum dc_irq_source { DC_IRQ_SOURCE_DMCUB_OUTBOX, DC_IRQ_SOURCE_DMCUB_OUTBOX0, DC_IRQ_SOURCE_DMCUB_GENERAL_DATAOUT, - DAL_IRQ_SOURCES_NUMBER, - /* Dummy interrupt source for USB4 HPD & HPD RX */ - DC_IRQ_SOURCE_USB4_DMUB_HPD, - DC_IRQ_SOURCE_USB4_DMUB_HPDRX, + DAL_IRQ_SOURCES_NUMBER }; enum irq_type -- 2.25.1