From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: "Alex Deucher" <alexander.deucher@amd.com>,
"Jack Xiao" <Jack.Xiao@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Hawking Zhang" <Hawking.Zhang@amd.com>
Subject: [PATCH 57/73] drm/amdgpu/mes: use ring for kernel queue submission
Date: Fri, 29 Apr 2022 13:46:08 -0400 [thread overview]
Message-ID: <20220429174624.459475-58-alexander.deucher@amd.com> (raw)
In-Reply-To: <20220429174624.459475-1-alexander.deucher@amd.com>
From: Jack Xiao <Jack.Xiao@amd.com>
Use ring as the front end for kernel queue submission.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 93 +++++++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 5 ++
2 files changed, 98 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 4e99adcfbb0e..827391fcb2a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -753,3 +753,96 @@ int amdgpu_mes_ctx_get_offs(struct amdgpu_ring *ring, unsigned int id_offs)
WARN_ON(1);
return -EINVAL;
}
+
+int amdgpu_mes_add_ring(struct amdgpu_device *adev, int gang_id,
+ int queue_type, int idx,
+ struct amdgpu_mes_ctx_data *ctx_data,
+ struct amdgpu_ring **out)
+{
+ struct amdgpu_ring *ring;
+ struct amdgpu_mes_gang *gang;
+ struct amdgpu_mes_queue_properties qprops = {0};
+ int r, queue_id, pasid;
+
+ mutex_lock(&adev->mes.mutex);
+ gang = idr_find(&adev->mes.gang_id_idr, gang_id);
+ if (!gang) {
+ DRM_ERROR("gang id %d doesn't exist\n", gang_id);
+ mutex_unlock(&adev->mes.mutex);
+ return -EINVAL;
+ }
+ pasid = gang->process->pasid;
+
+ ring = kzalloc(sizeof(struct amdgpu_ring), GFP_KERNEL);
+ if (!ring) {
+ mutex_unlock(&adev->mes.mutex);
+ return -ENOMEM;
+ }
+
+ ring->ring_obj = NULL;
+ ring->use_doorbell = true;
+ ring->is_mes_queue = true;
+ ring->mes_ctx = ctx_data;
+ ring->idx = idx;
+ ring->no_scheduler = true;
+
+ if (queue_type == AMDGPU_RING_TYPE_COMPUTE) {
+ int offset = offsetof(struct amdgpu_mes_ctx_meta_data,
+ compute[ring->idx].mec_hpd);
+ ring->eop_gpu_addr =
+ amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset);
+ }
+
+ switch (queue_type) {
+ case AMDGPU_RING_TYPE_GFX:
+ ring->funcs = adev->gfx.gfx_ring[0].funcs;
+ break;
+ case AMDGPU_RING_TYPE_COMPUTE:
+ ring->funcs = adev->gfx.compute_ring[0].funcs;
+ break;
+ case AMDGPU_RING_TYPE_SDMA:
+ ring->funcs = adev->sdma.instance[0].ring.funcs;
+ break;
+ default:
+ BUG();
+ }
+
+ r = amdgpu_ring_init(adev, ring, 1024, NULL, 0,
+ AMDGPU_RING_PRIO_DEFAULT, NULL);
+ if (r)
+ goto clean_up_memory;
+
+ amdgpu_mes_ring_to_queue_props(adev, ring, &qprops);
+
+ dma_fence_wait(gang->process->vm->last_update, false);
+ dma_fence_wait(ctx_data->meta_data_va->last_pt_update, false);
+ mutex_unlock(&adev->mes.mutex);
+
+ r = amdgpu_mes_add_hw_queue(adev, gang_id, &qprops, &queue_id);
+ if (r)
+ goto clean_up_ring;
+
+ ring->hw_queue_id = queue_id;
+ ring->doorbell_index = qprops.doorbell_off;
+
+ if (queue_type == AMDGPU_RING_TYPE_GFX)
+ sprintf(ring->name, "gfx_%d.%d.%d", pasid, gang_id, queue_id);
+ else if (queue_type == AMDGPU_RING_TYPE_COMPUTE)
+ sprintf(ring->name, "compute_%d.%d.%d", pasid, gang_id,
+ queue_id);
+ else if (queue_type == AMDGPU_RING_TYPE_SDMA)
+ sprintf(ring->name, "sdma_%d.%d.%d", pasid, gang_id,
+ queue_id);
+ else
+ BUG();
+
+ *out = ring;
+ return 0;
+
+clean_up_ring:
+ amdgpu_ring_fini(ring);
+clean_up_memory:
+ kfree(ring);
+ mutex_unlock(&adev->mes.mutex);
+ return r;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 36684416f277..1fe5c869f37e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -254,4 +254,9 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
int *queue_id);
int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id);
+int amdgpu_mes_add_ring(struct amdgpu_device *adev, int gang_id,
+ int queue_type, int idx,
+ struct amdgpu_mes_ctx_data *ctx_data,
+ struct amdgpu_ring **out);
+
#endif /* __AMDGPU_MES_H__ */
--
2.35.1
next prev parent reply other threads:[~2022-04-29 17:47 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-29 17:45 [PATCH 00/73] MES support Alex Deucher
2022-04-29 17:45 ` [PATCH 01/73] drm/amdgpu: define MQD abstract layer for hw ip Alex Deucher
2022-04-29 17:45 ` [PATCH 02/73] drm/amdgpu: add helper function to initialize mqd from ring v4 Alex Deucher
2022-04-29 17:45 ` [PATCH 03/73] drm/amdgpu: add the per-context meta data v3 Alex Deucher
2022-04-29 17:45 ` [PATCH 04/73] drm/amdgpu: add mes ctx data in amdgpu_ring Alex Deucher
2022-04-29 17:45 ` [PATCH 05/73] drm/amdgpu: define ring structure to access rptr/wptr/fence Alex Deucher
2022-04-29 17:45 ` [PATCH 06/73] drm/amdgpu: use ring structure to access rptr/wptr v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 07/73] drm/amdgpu: initialize/finalize the ring for mes queue Alex Deucher
2022-04-29 17:45 ` [PATCH 08/73] drm/amdgpu: assign the cpu/gpu address of fence from ring Alex Deucher
2022-04-29 17:45 ` [PATCH 09/73] drm/amdgpu/gfx10: implement mqd functions of gfx/compute eng v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 10/73] drm/amdgpu/gfx10: use per ctx CSA for ce metadata Alex Deucher
2022-04-29 17:45 ` [PATCH 11/73] drm/amdgpu/gfx10: use per ctx CSA for de metadata Alex Deucher
2022-04-29 17:45 ` [PATCH 12/73] drm/amdgpu/gfx10: associate mes queue id with fence v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 13/73] drm/amdgpu/gfx10: inherit vmid from mqd Alex Deucher
2022-04-29 17:45 ` [PATCH 14/73] drm/amdgpu/gfx10: use INVALIDATE_TLBS to invalidate TLBs v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 15/73] drm/amdgpu/gmc10: skip emitting pasid mapping packet Alex Deucher
2022-04-29 17:45 ` [PATCH 16/73] drm/amdgpu: use the whole doorbell space for mes Alex Deucher
2022-04-29 17:45 ` [PATCH 17/73] drm/amdgpu: update mes process/gang/queue definitions Alex Deucher
2022-04-29 17:45 ` [PATCH 18/73] drm/amdgpu: add mes_kiq module parameter v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 19/73] drm/amdgpu: allocate doorbell index for mes kiq Alex Deucher
2022-04-29 17:45 ` [PATCH 20/73] drm/amdgpu/mes: extend mes framework to support multiple mes pipes Alex Deucher
2022-04-29 17:45 ` [PATCH 21/73] drm/amdgpu/gfx10: add mes queue fence handling Alex Deucher
2022-04-29 17:45 ` [PATCH 22/73] drm/amdgpu/gfx10: add mes support for gfx ib test Alex Deucher
2022-04-29 17:45 ` [PATCH 23/73] drm/amdgpu: don't use kiq to flush gpu tlb if mes enabled Alex Deucher
2022-04-29 17:45 ` [PATCH 24/73] drm/amdgpu/sdma: use per-ctx sdma csa address for mes sdma queue Alex Deucher
2022-04-29 17:45 ` [PATCH 25/73] drm/amdgpu/sdma5.2: initialize sdma mqd Alex Deucher
2022-04-29 17:45 ` [PATCH 26/73] drm/amdgpu/sdma5.2: associate mes queue id with fence Alex Deucher
2022-04-29 17:45 ` [PATCH 27/73] drm/amdgpu/sdma5.2: add mes queue fence handling Alex Deucher
2022-04-29 17:45 ` [PATCH 28/73] drm/amdgpu/sdma5.2: add mes support for sdma ring test Alex Deucher
2022-04-29 17:45 ` [PATCH 29/73] drm/amdgpu/sdma5.2: add mes support for sdma ib test Alex Deucher
2022-04-29 17:45 ` [PATCH 30/73] drm/amdgpu/sdma5: initialize sdma mqd Alex Deucher
2022-04-29 17:45 ` [PATCH 31/73] drm/amdgpu/sdma5: associate mes queue id with fence Alex Deucher
2022-04-29 17:45 ` [PATCH 32/73] drm/amdgpu/sdma5: add mes queue fence handling Alex Deucher
2022-04-29 17:45 ` [PATCH 33/73] drm/amdgpu/sdma5: add mes support for sdma ring test Alex Deucher
2022-04-29 17:45 ` [PATCH 34/73] drm/amdgpu/sdma5: add mes support for sdma ib test Alex Deucher
2022-04-29 17:45 ` [PATCH 35/73] drm/amdgpu: add mes kiq PSP GFX FW type Alex Deucher
2022-04-29 17:45 ` [PATCH 36/73] drm/amdgpu/mes: add mes kiq callback Alex Deucher
2022-04-29 17:45 ` [PATCH 37/73] drm/amdgpu: add mes kiq frontdoor loading support Alex Deucher
2022-04-29 17:45 ` [PATCH 38/73] drm/amdgpu: enable mes kiq N-1 test on sienna cichlid Alex Deucher
2022-04-29 17:45 ` [PATCH 39/73] drm/amdgpu/mes: manage mes doorbell allocation Alex Deucher
2022-04-29 17:45 ` [PATCH 40/73] drm/amdgpu: add mes queue id mask v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 41/73] drm/amdgpu/mes: initialize/finalize common mes structure v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 42/73] drm/amdgpu/mes: relocate status_fence slot allocation Alex Deucher
2022-04-29 17:45 ` [PATCH 43/73] drm/amdgpu/mes10.1: call general mes initialization Alex Deucher
2022-04-29 17:45 ` [PATCH 44/73] drm/amdgpu/mes10.1: add delay after mes engine enable Alex Deucher
2022-04-29 17:45 ` [PATCH 45/73] drm/amdgpu/mes10.1: implement the suspend/resume routine Alex Deucher
2022-04-29 17:45 ` [PATCH 46/73] drm/amdgpu/mes: implement creating mes process v2 Alex Deucher
2022-04-29 17:45 ` [PATCH 47/73] drm/amdgpu/mes: implement destroying mes process Alex Deucher
2022-04-29 17:45 ` [PATCH 48/73] drm/amdgpu/mes: implement adding mes gang Alex Deucher
2022-04-29 17:46 ` [PATCH 49/73] drm/amdgpu/mes: implement removing " Alex Deucher
2022-04-29 17:46 ` [PATCH 50/73] drm/amdgpu/mes: implement suspending all gangs Alex Deucher
2022-04-29 17:46 ` [PATCH 51/73] drm/amdgpu/mes: implement resuming " Alex Deucher
2022-04-29 17:46 ` [PATCH 52/73] drm/amdgpu/mes: initialize mqd from queue properties Alex Deucher
2022-04-29 17:46 ` [PATCH 53/73] drm/amdgpu/mes: implement adding mes queue Alex Deucher
2022-04-29 17:46 ` [PATCH 54/73] drm/amdgpu/mes: implement removing " Alex Deucher
2022-04-29 17:46 ` [PATCH 55/73] drm/amdgpu/mes: add helper function to convert ring to queue property Alex Deucher
2022-04-29 17:46 ` [PATCH 56/73] drm/amdgpu/mes: add helper function to get the ctx meta data offset Alex Deucher
2022-04-29 17:46 ` Alex Deucher [this message]
2022-04-29 17:46 ` [PATCH 58/73] drm/amdgpu/mes: implement removing mes ring Alex Deucher
2022-04-29 17:46 ` [PATCH 59/73] drm/amdgpu/mes: add helper functions to alloc/free ctx metadata Alex Deucher
2022-04-29 17:46 ` [PATCH 60/73] drm/amdgpu: skip kfd routines when mes enabled Alex Deucher
2022-04-29 17:46 ` [PATCH 61/73] drm/amdgpu: Enable KFD with MES enabled Alex Deucher
2022-04-29 17:46 ` [PATCH 62/73] drm/amdgpu: skip some checking for mes queue ib submission Alex Deucher
2022-04-29 17:46 ` [PATCH 63/73] drm/amdgpu: skip kiq ib tests if mes enabled Alex Deucher
2022-04-29 17:46 ` [PATCH 64/73] drm/amdgpu: skip gds switch for mes queue Alex Deucher
2022-04-29 17:46 ` [PATCH 65/73] drm/amdgpu: kiq takes charge of all queues Alex Deucher
2022-04-29 17:46 ` [PATCH 66/73] drm/amdgpu/mes: map ctx metadata for mes self test Alex Deucher
2022-04-29 17:46 ` [PATCH 67/73] drm/amdgpu/mes: create gang and queues " Alex Deucher
2022-04-29 17:46 ` [PATCH 68/73] drm/amdgpu/mes: add ring/ib test " Alex Deucher
2022-04-29 17:46 ` [PATCH 69/73] drm/amdgpu/mes: implement " Alex Deucher
2022-04-29 17:46 ` [PATCH 70/73] drm/amdgpu/mes10.1: add mes self test in late init Alex Deucher
2022-04-29 17:46 ` [PATCH 71/73] drm/amdgpu/mes: fix vm csa update issue Alex Deucher
2022-04-29 17:46 ` [PATCH 72/73] drm/amdgpu/mes: disable mes sdma queue test Alex Deucher
2022-04-29 17:46 ` [PATCH 73/73] drm/amdgpu/mes: Update the doorbell function signatures Alex Deucher
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