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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2022 19:31:48.7892 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 96d41811-24ce-4567-67ad-08da44ce8999 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB2849 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dingchen.zhang@amd.com, Leo Li , Robin Chen , roman.li@amd.com, alexander.deucher@amd.com, harry.wentland@amd.com Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Robin Chen [Why] To wrap the decision logic of sending dirty rect dmub command for both frame update and cursor update path. Signed-off-by: Robin Chen Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc.c | 14 ++++++++++- .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 24 ++++++++++++++----- 2 files changed, 31 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 31d83297bcb5..645ec5bc3a7d 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -2827,6 +2827,18 @@ static void commit_planes_do_stream_update(struct dc *dc, } } +static bool dc_dmub_should_send_dirty_rect_cmd(struct dc *dc, struct dc_stream_state *stream) +{ + if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) + return true; + + if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1 && + dc->debug.enable_sw_cntl_psr) + return true; + + return false; +} + void dc_dmub_update_dirty_rect(struct dc *dc, int surface_count, struct dc_stream_state *stream, @@ -2839,7 +2851,7 @@ void dc_dmub_update_dirty_rect(struct dc *dc, unsigned int i, j; unsigned int panel_inst = 0; - if (stream->link->psr_settings.psr_version != DC_PSR_VERSION_SU_1) + if (!dc_dmub_should_send_dirty_rect_cmd(dc, stream)) return; if (!dc_get_edp_link_panel_inst(dc, stream->link, &panel_inst)) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 7fe06a2c0c04..5b5e0dd13fd0 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -3325,6 +3325,23 @@ static bool dcn10_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx) return false; } +static bool dcn10_dmub_should_update_cursor_data( + struct pipe_ctx *pipe_ctx, + struct dc_debug_options *debug) +{ + if (pipe_ctx->plane_state->address.type == PLN_ADDR_TYPE_VIDEO_PROGRESSIVE) + return false; + + if (pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) + return true; + + if (pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_1 && + debug->enable_sw_cntl_psr) + return true; + + return false; +} + static void dcn10_dmub_update_cursor_data( struct pipe_ctx *pipe_ctx, struct hubp *hubp, @@ -3346,13 +3363,8 @@ static void dcn10_dmub_update_cursor_data( struct dc_debug_options *debug = &hubp->ctx->dc->debug; - if (!debug->enable_sw_cntl_psr && pipe_ctx->stream->link->psr_settings.psr_version != DC_PSR_VERSION_SU_1) + if (!dcn10_dmub_should_update_cursor_data(pipe_ctx, debug)) return; - - if (pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED || - pipe_ctx->plane_state->address.type == PLN_ADDR_TYPE_VIDEO_PROGRESSIVE) - return; - /** * if cur_pos == NULL means the caller is from cursor_set_attribute * then driver use previous cursor position data -- 2.36.1