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Fri, 15 Jul 2022 13:17:44 -0500 From: Rodrigo Siqueira To: Subject: [PATCH 16/31] drm/amd/display: Update Cursor Attribute MALL cache Date: Fri, 15 Jul 2022 14:16:50 -0400 Message-ID: <20220715181705.1030401-17-Rodrigo.Siqueira@amd.com> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220715181705.1030401-1-Rodrigo.Siqueira@amd.com> References: <20220715181705.1030401-1-Rodrigo.Siqueira@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: bc709d58-56bd-48fa-7f19-08da668e5132 X-MS-TrafficTypeDiagnostic: CY5PR12MB6455:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: m2j1aON+TlZKKxq1qT2qB7EadEmx848djWI8rJFfRHJdTGH2tVbs+lOATKZ2X4UhV8+MqwQ6A7OfOk9Mgo6mrHp651ZneLQR4rqWp7PiES6cKIh7RIW+r9+XSdDXKVsJxYxLqWiaveUTE6mnKXNt1Vy7dNYy9JGd6vSxZMcX8s/j9sWwbRcNzj7B2Xkd2y5zIxmYhFD4pXxCU7GTgSg0JJ3LN3FAvmQprd2ODxNns59XsxM55vmGAWVUrUZOkHkZBqiSyMwLOWZhUOUMkoc4K7xuF52PMIZInpdxg0uxtzfK7dQt1xgkSDgr5ODIPN9CUIwqxpVYXGW/q1DBAoljyl5cjCldgGdlm6RvHLvXMsaITw2k3uYVLnSxSgwbyk5gp5zgP29jczX9Ht0cN1raSlhBE1mIPUUorr6HrK05zZV2WjkaIHW5Qv2thIbEhwN/R6nS40WiPaC5A78Brbu3bWE6x56pFjgWBEGncDSyAgGL4fV45wLv7oJm1dTHS2wA1/90dkgHPuNDRfmthVEF1Rtvq970tkWaK0TlcN630tQpmX5P8IX3Uz6kvfyFbzu346gmaRtQZkmX/iEexV3IGs46T41tXbYDNdT87UW2OJvCIS1QsSCLUrcCeXeGph7dji8mtSlMtwZFAIcCx44KyDjHft/tx35TCg+8VZrtH/StONAWxvyVnW7s2YOwlH17xiHLWa8k1vj8VNAqO7cUcjd33W04ZknuYnOFH5jit3HM9XzxIXcW8GN5i1mRxLRV71qgay46HP4773ZyLRB/KmBQg8HdnwrBAhiC3hcSWnCYnyJNkZ2UZ2IDFZeqM0rOd5B85rug6wxCu/oeRe/HgvKou6/EsSHyEwDlYrbUb1A= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230016)(4636009)(346002)(136003)(39860400002)(396003)(376002)(36840700001)(46966006)(40470700004)(36860700001)(40460700003)(86362001)(82310400005)(478600001)(356005)(26005)(8936002)(82740400003)(15650500001)(5660300002)(316002)(70586007)(186003)(40480700001)(1076003)(336012)(6916009)(4326008)(41300700001)(47076005)(426003)(83380400001)(70206006)(6666004)(36756003)(54906003)(81166007)(2616005)(8676002)(2906002)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jul 2022 18:17:45.8905 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bc709d58-56bd-48fa-7f19-08da668e5132 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6455 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stylon.wang@amd.com, Alan Liu , Chris Park , Sunpeng.Li@amd.com, Harry.Wentland@amd.com, qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com, roman.li@amd.com, solomon.chiu@amd.com, Aurabindo.Pillai@amd.com, Alvin Lee , wayne.lin@amd.com, Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com, pavle.kotarac@amd.com Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Chris Park [Why] Cursor size can update without MALL cache update. Update the register on cursor attribute as well. [How] Update cursor MALL cache on cursor attribute update. Reviewed-by: Alvin Lee Acked-by: Alan Liu Signed-off-by: Chris Park --- .../gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c | 40 ++++++++++++++++++- .../gpu/drm/amd/display/dc/dcn32/dcn32_hubp.h | 3 ++ 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c index 0a7d64306481..3176b04a7740 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c @@ -94,6 +94,44 @@ void hubp32_phantom_hubp_post_enable(struct hubp *hubp) } } +void hubp32_cursor_set_attributes( + struct hubp *hubp, + const struct dc_cursor_attributes *attr) +{ + struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp); + enum cursor_pitch hw_pitch = hubp1_get_cursor_pitch(attr->pitch); + enum cursor_lines_per_chunk lpc = hubp2_get_lines_per_chunk( + attr->width, attr->color_format); + + hubp->curs_attr = *attr; + + REG_UPDATE(CURSOR_SURFACE_ADDRESS_HIGH, + CURSOR_SURFACE_ADDRESS_HIGH, attr->address.high_part); + REG_UPDATE(CURSOR_SURFACE_ADDRESS, + CURSOR_SURFACE_ADDRESS, attr->address.low_part); + + REG_UPDATE_2(CURSOR_SIZE, + CURSOR_WIDTH, attr->width, + CURSOR_HEIGHT, attr->height); + + REG_UPDATE_4(CURSOR_CONTROL, + CURSOR_MODE, attr->color_format, + CURSOR_2X_MAGNIFY, attr->attribute_flags.bits.ENABLE_MAGNIFICATION, + CURSOR_PITCH, hw_pitch, + CURSOR_LINES_PER_CHUNK, lpc); + + REG_SET_2(CURSOR_SETTINGS, 0, + /* no shift of the cursor HDL schedule */ + CURSOR0_DST_Y_OFFSET, 0, + /* used to shift the cursor chunk request deadline */ + CURSOR0_CHUNK_HDL_ADJUST, 3); + + if (attr->width * attr->height * 4 > 16384) + REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, true); + else + REG_UPDATE(DCHUBP_MALL_CONFIG, USE_MALL_FOR_CURSOR, false); +} + static struct hubp_funcs dcn32_hubp_funcs = { .hubp_enable_tripleBuffer = hubp2_enable_triplebuffer, .hubp_is_triplebuffer_enabled = hubp2_is_triplebuffer_enabled, @@ -106,7 +144,7 @@ static struct hubp_funcs dcn32_hubp_funcs = { .set_blank = hubp2_set_blank, .dcc_control = hubp3_dcc_control, .mem_program_viewport = min_set_viewport, - .set_cursor_attributes = hubp2_cursor_set_attributes, + .set_cursor_attributes = hubp32_cursor_set_attributes, .set_cursor_position = hubp2_cursor_set_position, .hubp_clk_cntl = hubp2_clk_cntl, .hubp_vtg_sel = hubp2_vtg_sel, diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.h index 00b4211389c2..c4315d50fbb0 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.h +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hubp.h @@ -58,6 +58,9 @@ void hubp32_prepare_subvp_buffering(struct hubp *hubp, bool enable); void hubp32_phantom_hubp_post_enable(struct hubp *hubp); +void hubp32_cursor_set_attributes(struct hubp *hubp, + const struct dc_cursor_attributes *attr); + bool hubp32_construct( struct dcn20_hubp *hubp2, struct dc_context *ctx, -- 2.37.0