From: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com,
roman.li@amd.com, solomon.chiu@amd.com, Aurabindo.Pillai@amd.com,
wayne.lin@amd.com, Jun Lei <jun.lei@amd.com>,
Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com,
pavle.kotarac@amd.com
Subject: [PATCH 17/31] drm/amd/display: Update DML logic for unbounded req handling
Date: Fri, 15 Jul 2022 14:16:51 -0400 [thread overview]
Message-ID: <20220715181705.1030401-18-Rodrigo.Siqueira@amd.com> (raw)
In-Reply-To: <20220715181705.1030401-1-Rodrigo.Siqueira@amd.com>
From: Jun Lei <jun.lei@amd.com>
[why]
Unbounded request logic in resource/DML has some issues where unbounded
request is being enabled incorrectly. SW today enables unbounded request
unconditionally in hardware, on the assumption that HW can always
support it in single pipe scenarios.
This worked until now because the same assumption is made in DML. A new
DML update is needed to fix a bug, where there are single pipe scenarios
where unbounded cannot be enabled, and this change in DML needs to be
ported in, and dcn32 resource logic fixed.
[how]
First, dcn32_resource should program unbounded req in HW according to
unbounded req enablement output from DML, as opposed to DML input.
Second, port in DML update which disables unbounded req in some
scenarios to fix an issue with poor stutter performance
Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
---
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 11 +++-
.../dc/dml/dcn32/display_mode_vba_32.c | 44 +++++++++++++---
.../dc/dml/dcn32/display_mode_vba_util_32.c | 51 ++++++++++++++++---
.../dc/dml/dcn32/display_mode_vba_util_32.h | 10 +++-
.../drm/amd/display/dc/dml/display_mode_vba.c | 1 +
5 files changed, 103 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
index 32da47e24839..39214a0dcdf2 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
@@ -3322,6 +3322,7 @@ void dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context, display
{
int i, pipe_idx;
bool usr_retraining_support = false;
+ bool unbounded_req_enabled = false;
/* Writeback MCIF_WB arbitration parameters */
dc->res_pool->funcs->set_mcif_arb_params(dc, context, pipes, pipe_cnt);
@@ -3357,6 +3358,14 @@ void dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context, display
if (context->bw_ctx.bw.dcn.clk.dispclk_khz < dc->debug.min_disp_clk_khz)
context->bw_ctx.bw.dcn.clk.dispclk_khz = dc->debug.min_disp_clk_khz;
+ unbounded_req_enabled = get_unbounded_request_enabled(&context->bw_ctx.dml, pipes, pipe_cnt);
+
+ if (unbounded_req_enabled && pipe_cnt > 1) {
+ // Unbounded requesting should not ever be used when more than 1 pipe is enabled.
+ ASSERT(false);
+ unbounded_req_enabled = false;
+ }
+
for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) {
if (!context->res_ctx.pipe_ctx[i].stream)
continue;
@@ -3375,7 +3384,7 @@ void dcn32_calculate_dlg_params(struct dc *dc, struct dc_state *context, display
} else {
context->res_ctx.pipe_ctx[i].det_buffer_size_kb = get_det_buffer_size_kbytes(&context->bw_ctx.dml, pipes, pipe_cnt,
pipe_idx);
- context->res_ctx.pipe_ctx[i].unbounded_req = pipes[pipe_idx].pipe.src.unbounded_req_mode;
+ context->res_ctx.pipe_ctx[i].unbounded_req = unbounded_req_enabled;
}
if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000)
context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
index 1712843dafaa..092782b6e341 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c
@@ -226,6 +226,9 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
mode_lib->vba.NumberOfActiveSurfaces,
mode_lib->vba.nomDETInKByte,
mode_lib->vba.UseUnboundedRequesting,
+ mode_lib->vba.DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment,
+ mode_lib->vba.ip.pixel_chunk_size_kbytes,
+ mode_lib->vba.ip.rob_buffer_size_kbytes,
mode_lib->vba.CompressedBufferSegmentSizeInkByteFinal,
v->dummy_vars
.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation
@@ -287,6 +290,10 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
mode_lib->vba.DETBufferSizeC,
&v->UnboundedRequestEnabled,
&v->CompressedBufferSizeInkByte,
+ &v->CompBufReservedSpaceKBytes,
+ &v->dummy_vars
+ .DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation
+ .dummy_boolean, /* bool *CompBufReservedSpaceNeedAjustment */
v->dummy_vars
.DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation
.dummy_boolean_array, /* bool ViewportSizeSupportPerSurface[] */
@@ -295,6 +302,9 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
.dummy_boolean); /* bool *ViewportSizeSupport */
}
+ v->CompBufReservedSpaceZs = v->CompBufReservedSpaceKBytes * 1024.0 / 256.0;
+ v->CompBufReservedSpace64B = v->CompBufReservedSpaceKBytes * 1024.0 / 64.0;
+
// DCFCLK Deep Sleep
dml32_CalculateDCFCLKDeepSleep(
mode_lib->vba.NumberOfActiveSurfaces,
@@ -1532,8 +1542,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
v->TotalDataReadBandwidth,
mode_lib->vba.DCFCLK,
mode_lib->vba.ReturnBW,
- mode_lib->vba.CompbufReservedSpace64B,
- mode_lib->vba.CompbufReservedSpaceZs,
+ v->CompbufReservedSpace64B,
+ v->CompbufReservedSpaceZs,
mode_lib->vba.SRExitTime,
mode_lib->vba.SRExitZ8Time,
mode_lib->vba.SynchronizeTimingsFinal,
@@ -1598,8 +1608,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
v->TotalDataReadBandwidth,
mode_lib->vba.DCFCLK,
mode_lib->vba.ReturnBW,
- 0, //mode_lib->vba.CompbufReservedSpace64B,
- 0, //mode_lib->vba.CompbufReservedSpaceZs,
+ 0, //CompbufReservedSpace64B,
+ 0, //CompbufReservedSpaceZs,
mode_lib->vba.SRExitTime,
mode_lib->vba.SRExitZ8Time,
mode_lib->vba.SynchronizeTimingsFinal,
@@ -1661,6 +1671,7 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
{
unsigned int dummy_integer[4];
+ bool dummy_boolean[2];
bool MPCCombineMethodAsNeededForPStateChangeAndVoltage;
bool MPCCombineMethodAsPossible;
enum odm_combine_mode dummy_odm_mode[DC__NUM_DPP__MAX];
@@ -1675,6 +1686,8 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
bool SubViewportMALLPStateMethod;
bool PhantomPipeMALLPStateMethod;
unsigned int MaximumMPCCombine;
+ bool CompBufReservedSpaceNeedAdjustment;
+ bool CompBufReservedSpaceNeedAdjustmentSingleDPP;
#ifdef __DML_VBA_DEBUG__
dml_print("DML::%s: called\n", __func__);
@@ -1907,6 +1920,9 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
mode_lib->vba.NumberOfActiveSurfaces,
mode_lib->vba.nomDETInKByte,
mode_lib->vba.UseUnboundedRequesting,
+ mode_lib->vba.DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment,
+ mode_lib->vba.ip.pixel_chunk_size_kbytes,
+ mode_lib->vba.ip.rob_buffer_size_kbytes,
mode_lib->vba.CompressedBufferSegmentSizeInkByteFinal,
mode_lib->vba.Output,
mode_lib->vba.ReadBandwidthLuma,
@@ -1954,6 +1970,8 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_integer_array[7], /* Long DETBufferSizeC[] */
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_boolean_array[0][0], /* bool *UnboundedRequestEnabled */
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_integer_array[0][0], /* Long *CompressedBufferSizeInkByte */
+ &v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_integer_array[1][0], /* Long *CompBufReservedSpaceKBytes */
+ &CompBufReservedSpaceNeedAdjustmentSingleDPP,
mode_lib->vba.SingleDPPViewportSizeSupportPerSurface,/* bool ViewportSizeSupportPerSurface[] */
&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_boolean_array[1][0]); /* bool *ViewportSizeSupport */
@@ -2122,9 +2140,18 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
}
}
+ // if TotalNumberOfActiveDPP is > 1, then there should be no unbounded req mode (hw limitation), the comp buf reserved adjustment is not needed regardless
+ // if TotalNumberOfActiveDPP is == 1, then will use the SingleDPP version of unbounded_req for the decision
+ CompBufReservedSpaceNeedAdjustment = (mode_lib->vba.TotalNumberOfActiveDPP[i][j] > 1) ? 0 : CompBufReservedSpaceNeedAdjustmentSingleDPP;
+
+
+
if (j == 1 && !dml32_UnboundedRequest(mode_lib->vba.UseUnboundedRequesting,
- mode_lib->vba.TotalNumberOfActiveDPP[i][j], NoChroma,
- mode_lib->vba.Output[0])) {
+ mode_lib->vba.TotalNumberOfActiveDPP[i][j], NoChroma,
+ mode_lib->vba.Output[0],
+ mode_lib->vba.SurfaceTiling[0],
+ CompBufReservedSpaceNeedAdjustment,
+ mode_lib->vba.DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment)) {
while (!(mode_lib->vba.TotalNumberOfActiveDPP[i][j] >= mode_lib->vba.MaxNumDPP
|| mode_lib->vba.TotalNumberOfSingleDPPSurfaces[i][j] == 0)) {
double BWOfNonCombinedSurfaceOfMaximumBandwidth = 0;
@@ -2502,6 +2529,9 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
mode_lib->vba.NumberOfActiveSurfaces,
mode_lib->vba.nomDETInKByte,
mode_lib->vba.UseUnboundedRequesting,
+ mode_lib->vba.DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment,
+ mode_lib->vba.ip.pixel_chunk_size_kbytes,
+ mode_lib->vba.ip.rob_buffer_size_kbytes,
mode_lib->vba.CompressedBufferSegmentSizeInkByteFinal,
mode_lib->vba.Output,
mode_lib->vba.ReadBandwidthLuma,
@@ -2548,6 +2578,8 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
mode_lib->vba.DETBufferSizeCThisState,
&mode_lib->vba.UnboundedRequestEnabledThisState,
&mode_lib->vba.CompressedBufferSizeInkByteThisState,
+ &dummy_integer[0], /* Long CompBufReservedSpaceKBytes */
+ &dummy_boolean[0], /* bool CompBufReservedSpaceNeedAdjustment */
v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.dummy_boolean_array[0],
&mode_lib->vba.ViewportSizeSupport[i][j]);
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index febaff7d7343..f7fe8f039ba3 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -454,6 +454,9 @@ void dml32_CalculateSwathAndDETConfiguration(
unsigned int NumberOfActiveSurfaces,
unsigned int nomDETInKByte,
enum unbounded_requesting_policy UseUnboundedRequestingFinal,
+ bool DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment,
+ unsigned int PixelChunkSizeKBytes,
+ unsigned int ROBSizeKBytes,
unsigned int CompressedBufferSegmentSizeInkByteFinal,
enum output_encoder_class Output[],
double ReadBandwidthLuma[],
@@ -501,6 +504,8 @@ void dml32_CalculateSwathAndDETConfiguration(
unsigned int DETBufferSizeC[],
bool *UnboundedRequestEnabled,
unsigned int *CompressedBufferSizeInkByte,
+ unsigned int *CompBufReservedSpaceKBytes,
+ bool *CompBufReservedSpaceNeedAdjustment,
bool ViewportSizeSupportPerSurface[],
bool *ViewportSizeSupport)
{
@@ -519,6 +524,8 @@ void dml32_CalculateSwathAndDETConfiguration(
#ifdef __DML_VBA_DEBUG__
dml_print("DML::%s: ForceSingleDPP = %d\n", __func__, ForceSingleDPP);
+ dml_print("DML::%s: ROBSizeKBytes = %d\n", __func__, ROBSizeKBytes);
+ dml_print("DML::%s: PixelChunkSizeKBytes = %d\n", __func__, PixelChunkSizeKBytes);
#endif
dml32_CalculateSwathWidth(ForceSingleDPP,
NumberOfActiveSurfaces,
@@ -588,8 +595,24 @@ void dml32_CalculateSwathAndDETConfiguration(
}
}
- *UnboundedRequestEnabled = dml32_UnboundedRequest(UseUnboundedRequestingFinal, TotalActiveDPP,
- NoChromaSurfaces, Output[0]);
+ // By default, just set the reserved space to 2 pixel chunks size
+ *CompBufReservedSpaceKBytes = PixelChunkSizeKBytes * 2;
+
+ // if unbounded req is enabled, program reserved space such that the ROB will not hold more than 8 swaths worth of data
+ // - assume worst-case compression rate of 4. [ROB size - 8 * swath_size / max_compression ratio]
+ // - assume for "narrow" vp case in which the ROB can fit 8 swaths, the DET should be big enough to do full size req
+ *CompBufReservedSpaceNeedAdjustment = ((int) ROBSizeKBytes - (int) *CompBufReservedSpaceKBytes) > (int) (RoundedUpMaxSwathSizeBytesY[0]/512);
+
+ if (*CompBufReservedSpaceNeedAdjustment == 1) {
+ *CompBufReservedSpaceKBytes = ROBSizeKBytes - RoundedUpMaxSwathSizeBytesY[0]/512;
+ }
+
+ #ifdef __DML_VBA_DEBUG__
+ dml_print("DML::%s: CompBufReservedSpaceKBytes = %d\n", __func__, *CompBufReservedSpaceKBytes);
+ dml_print("DML::%s: CompBufReservedSpaceNeedAdjustment = %d\n", __func__, *CompBufReservedSpaceNeedAdjustment);
+ #endif
+
+ *UnboundedRequestEnabled = dml32_UnboundedRequest(UseUnboundedRequestingFinal, TotalActiveDPP, NoChromaSurfaces, Output[0], SurfaceTiling[0], *CompBufReservedSpaceNeedAdjustment, DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment);
dml32_CalculateDETBufferSize(DETSizeOverride,
UseMALLForPStateChange,
@@ -907,9 +930,12 @@ void dml32_CalculateSwathWidth(
} // CalculateSwathWidth
bool dml32_UnboundedRequest(enum unbounded_requesting_policy UseUnboundedRequestingFinal,
- unsigned int TotalNumberOfActiveDPP,
- bool NoChroma,
- enum output_encoder_class Output)
+ unsigned int TotalNumberOfActiveDPP,
+ bool NoChroma,
+ enum output_encoder_class Output,
+ enum dm_swizzle_mode SurfaceTiling,
+ bool CompBufReservedSpaceNeedAdjustment,
+ bool DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment)
{
bool ret_val = false;
@@ -917,7 +943,20 @@ bool dml32_UnboundedRequest(enum unbounded_requesting_policy UseUnboundedRequest
TotalNumberOfActiveDPP == 1 && NoChroma);
if (UseUnboundedRequestingFinal == dm_unbounded_requesting_edp_only && Output != dm_edp)
ret_val = false;
- return ret_val;
+
+ if (SurfaceTiling == dm_sw_linear)
+ ret_val = false;
+
+ if (CompBufReservedSpaceNeedAdjustment == 1 && DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment)
+ ret_val = false;
+
+#ifdef __DML_VBA_DEBUG__
+ dml_print("DML::%s: CompBufReservedSpaceNeedAdjustment = %d\n", __func__, CompBufReservedSpaceNeedAdjustment);
+ dml_print("DML::%s: DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment = %d\n", __func__, DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment);
+ dml_print("DML::%s: ret_val = %d\n", __func__, ret_val);
+#endif
+
+ return (ret_val);
}
void dml32_CalculateDETBufferSize(
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
index 72461b934ee0..d293856ba906 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.h
@@ -90,6 +90,9 @@ void dml32_CalculateSwathAndDETConfiguration(
unsigned int NumberOfActiveSurfaces,
unsigned int nomDETInKByte,
enum unbounded_requesting_policy UseUnboundedRequestingFinal,
+ bool DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment,
+ unsigned int PixelChunkSizeKBytes,
+ unsigned int ROBSizeKBytes,
unsigned int CompressedBufferSegmentSizeInkByteFinal,
enum output_encoder_class Output[],
double ReadBandwidthLuma[],
@@ -137,6 +140,8 @@ void dml32_CalculateSwathAndDETConfiguration(
unsigned int DETBufferSizeC[],
bool *UnboundedRequestEnabled,
unsigned int *CompressedBufferSizeInkByte,
+ unsigned int *CompBufReservedSpaceKBytes,
+ bool *CompBufReservedSpaceNeedAdjustment,
bool ViewportSizeSupportPerSurface[],
bool *ViewportSizeSupport);
@@ -181,7 +186,10 @@ void dml32_CalculateSwathWidth(
bool dml32_UnboundedRequest(enum unbounded_requesting_policy UseUnboundedRequestingFinal,
unsigned int TotalNumberOfActiveDPP,
bool NoChroma,
- enum output_encoder_class Output);
+ enum output_encoder_class Output,
+ enum dm_swizzle_mode SurfaceTiling,
+ bool CompBufReservedSpaceNeedAdjustment,
+ bool DisableUnboundRequestIfCompBufReservedSpaceNeedAdjustment);
void dml32_CalculateDETBufferSize(
unsigned int DETSizeOverride[],
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 083f89e276d6..22ce975527a3 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -111,6 +111,7 @@ dml_get_attr_func(tcalc, mode_lib->vba.TCalc);
dml_get_attr_func(fraction_of_urgent_bandwidth, mode_lib->vba.FractionOfUrgentBandwidth);
dml_get_attr_func(fraction_of_urgent_bandwidth_imm_flip, mode_lib->vba.FractionOfUrgentBandwidthImmediateFlip);
+
dml_get_attr_func(cstate_max_cap_mode, mode_lib->vba.DCHUBBUB_ARB_CSTATE_MAX_CAP_MODE);
dml_get_attr_func(comp_buffer_size_kbytes, mode_lib->vba.CompressedBufferSizeInkByte);
dml_get_attr_func(pixel_chunk_size_in_kbyte, mode_lib->vba.PixelChunkSizeInKByte);
--
2.37.0
next prev parent reply other threads:[~2022-07-16 14:38 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-15 18:16 [PATCH 00/31] DC Patches July 15, 2022 Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 01/31] drm/amd/display: Support vertical interrupt 0 for all dcn ASIC Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 02/31] drm/amd/display: Remove unused variable Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 03/31] drm/amd/display: Update in dml Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 04/31] drm/amd/display: Expose function reset_cur_dp_mst_topology Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 05/31] drm/amd/display: fix trigger_hotplug to support mst case Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 06/31] drm/amd/display: Add is_mst_connector debugfs entry Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 07/31] drm/amd/display: Add tags for indicating mst progress status Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 08/31] drm/amd/display: Create a file dedicated to planes Rodrigo Siqueira
2022-07-18 14:29 ` Alex Deucher
2022-07-18 14:55 ` Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 09/31] drm/amd/display: Create a file dedicated for CRTC Rodrigo Siqueira
2022-07-20 17:36 ` André Almeida
2022-07-15 18:16 ` [PATCH 10/31] drm/amd/display: remove number of DSC slices override in DML Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 11/31] drm/amd/display: Fix hard hang if DSC is disabled Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 12/31] drm/amd/display: Don't set dram clock change requirement for SubVP Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 13/31] drm/amd/display: Update de-tile override to anticipate pipe splitting Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 14/31] drm/amd/display: Disable GPUVM in IP resource configuration Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 15/31] drm/amd/display: Loop through all pipes for DET allocation Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 16/31] drm/amd/display: Update Cursor Attribute MALL cache Rodrigo Siqueira
2022-07-15 18:16 ` Rodrigo Siqueira [this message]
2022-07-15 18:16 ` [PATCH 18/31] drm/amd/display: Drop FPU flags from dcn32_clk_mgr Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 19/31] drm/amd/display: Move populate phaton function to dml Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 20/31] drm/amd/display: Move predict pipe to dml fpu folder Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 21/31] drm/amd/display: Move insert entry table to the FPU code Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 22/31] drm/amd/display: Move phanton stream to " Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 23/31] drm/amd/display: Move SubVP functions to dcn32_fpu Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 24/31] drm/amd/display: Move wm and dlg calculation to FPU code Rodrigo Siqueira
2022-07-15 18:16 ` [PATCH 25/31] drm/amd/display: Move dlg params calculation Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 26/31] drm/amd/display: Move ntuple to insert entry Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 27/31] drm/amd/display: Move bounding box to FPU folder Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 28/31] drm/amd/display: Drop FPU flags from dcn32 Makefile Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 29/31] drm/amd/display: Create dcn321_fpu file Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 30/31] drm/amd/display: Drop FPU code from dcn321 resource Rodrigo Siqueira
2022-07-15 18:17 ` [PATCH 31/31] drm/amd/display: 3.2.195 Rodrigo Siqueira
2022-07-18 13:15 ` [PATCH 00/31] DC Patches July 15, 2022 Wheeler, Daniel
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