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From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Alex Deucher <alexander.deucher@amd.com>,
	Horace Chen <horace.chen@amd.com>,
	Hawking Zhang <Hawking.Zhang@amd.com>
Subject: [PATCH 04/19] drm/amdgpu: enable WPTR_POLL_ENABLE for sriov on sdma_v6_0
Date: Tue, 30 Aug 2022 14:39:57 -0400	[thread overview]
Message-ID: <20220830184012.1825313-4-alexander.deucher@amd.com> (raw)
In-Reply-To: <20220830184012.1825313-1-alexander.deucher@amd.com>

From: Horace Chen <horace.chen@amd.com>

[Why]
Under SR-IOV, if VF is switched out then its doorbell will be disabled,
SDMA rely on WPTR_POLL to get doorbells which was sent during VF
switched-out time.

[How]
For SR-IOV, set SDMA WPTR_POLL_ENABLE to 1.

Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
index 2bc1407e885e..fb31dc911cd7 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
@@ -594,7 +594,10 @@ static int sdma_v6_0_gfx_resume(struct amdgpu_device *adev)
 		       lower_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFC);
 
 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1);
-		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 0);
+		if (amdgpu_sriov_vf(adev))
+			rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 1);
+		else
+			rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 0);
 		rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, F32_WPTR_POLL_ENABLE, 1);
 
 		WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);
-- 
2.37.1


  parent reply	other threads:[~2022-08-30 18:41 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-30 18:39 [PATCH 01/19] drm/amdgpu: add CHIP_IP_DISCOVERY support for virtualization Alex Deucher
2022-08-30 18:39 ` [PATCH 02/19] drm/amdgpu: add sriov nbio callback structure Alex Deucher
2022-08-30 18:39 ` [PATCH 03/19] drm/amdgpu: add a compute pipe reset for RS64 Alex Deucher
2022-08-30 18:39 ` Alex Deucher [this message]
2022-08-30 18:39 ` [PATCH 05/19] drm/amdgpu: refine virtualization psp fw skip check Alex Deucher
2022-08-30 18:39 ` [PATCH 06/19] drm/amdgpu: sriov remove vcn_4_0 and jpeg_4_0 Alex Deucher
2022-08-30 18:40 ` [PATCH 07/19] drm/amdgpu: Support PSP 13.0.10 on SR-IOV Alex Deucher
2022-08-30 18:40 ` [PATCH 08/19] drm/amdgpu: Use PSP program IH_RB_CNTL registers under SRIOV Alex Deucher
2022-08-30 18:40 ` [PATCH 09/19] drm/amdgpu: Skip the program of MMMC_VM_AGP_* in SRIOV on MMHUB v3_0_0 Alex Deucher
2022-08-30 18:40 ` [PATCH 10/19] drm/amdgpu: skip "Issue additional private vm invalidation to MMHUB" on SRIOV Alex Deucher
2022-08-30 18:40 ` [PATCH 11/19] drm/amdgpu: Skip the VRAM base offset " Alex Deucher
2022-08-30 18:40 ` [PATCH 12/19] drm/amdgpu: Skip program SDMA0_SEM_WAIT_FAIL_TIMER_CNTL under SRIOV VF Alex Deucher
2022-08-30 18:40 ` [PATCH 13/19] drm/amdgpu: Use RLCG to program GRBM_GFX_CNTL during full access time Alex Deucher
2022-08-30 18:40 ` [PATCH 14/19] drm/admgpu: Skip CG/PG on SOC21 under SRIOV VF Alex Deucher
2022-08-30 18:40 ` [PATCH 15/19] drm/amd: Skip smu_v13 register irq on " Alex Deucher
2022-08-30 18:40 ` [PATCH 16/19] drm/amdgpu/vcn: Disable CG/PG for SRIOV Alex Deucher
2022-08-30 18:40 ` [PATCH 17/19] drm/amdgpu/vcn: Add vcn/vcn1 in white list to load its firmware under sriov Alex Deucher
2022-08-30 18:40 ` [PATCH 18/19] drm/amdgpu/vcn: Add sriov VCN v4_0 unified queue support Alex Deucher
2022-08-30 18:40 ` [PATCH 19/19] drm/amdgpu/vcn: Add MMSCH v4_0 support for sriov Alex Deucher
2022-08-31  8:05 ` [PATCH 01/19] drm/amdgpu: add CHIP_IP_DISCOVERY support for virtualization Christian König

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