From: Ma Jun <Jun.Ma2@amd.com>
To: <amd-gfx@lists.freedesktop.org>, <felix.kuehling@amd.com>,
<alexander.deucher@amd.com>
Cc: guchun.chen@amd.com
Subject: [PATCH v2 1/2] drm/amdkfd: Init the base cu processor id
Date: Wed, 26 Oct 2022 17:03:12 +0800 [thread overview]
Message-ID: <20221026090313.4117136-1-Jun.Ma2@amd.com> (raw)
Init and save the base cu processor id for later use
Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 20 +++++++++++++-------
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 3 +++
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index d25ac9cbe5b2..35d09e29aafb 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -41,13 +41,18 @@ static uint32_t gpu_processor_id_low = 0x80001000;
* @total_cu_count - Total CUs present in the GPU including ones
* masked off
*/
-static inline unsigned int get_and_inc_gpu_processor_id(
- unsigned int total_cu_count)
+static inline void assign_gpu_processor_id(struct kfd_dev *kfd)
{
- int current_id = gpu_processor_id_low;
+ struct amdgpu_device *adev = kfd->adev;
+ unsigned int array_count = 0;
+ unsigned int total_cu_count = 0;
+
+ kfd->processor_id_low = gpu_processor_id_low;
+
+ array_count = adev->gfx.config.max_sh_per_se * adev->gfx.config.max_shader_engines;
+ total_cu_count = array_count * adev->gfx.config.max_cu_per_sh;
gpu_processor_id_low += total_cu_count;
- return current_id;
}
/* Static table to describe GPU Cache information */
@@ -2223,7 +2228,6 @@ static int kfd_create_vcrat_image_gpu(void *pcrat_image,
struct crat_subtype_computeunit *cu;
struct kfd_cu_info cu_info;
int avail_size = *size;
- uint32_t total_num_of_cu;
int num_of_cache_entries = 0;
int cache_mem_filled = 0;
uint32_t nid = 0;
@@ -2275,8 +2279,10 @@ static int kfd_create_vcrat_image_gpu(void *pcrat_image,
cu->wave_front_size = cu_info.wave_front_size;
cu->array_count = cu_info.num_shader_arrays_per_engine *
cu_info.num_shader_engines;
- total_num_of_cu = (cu->array_count * cu_info.num_cu_per_sh);
- cu->processor_id_low = get_and_inc_gpu_processor_id(total_num_of_cu);
+
+ assign_gpu_processor_id(kdev);
+ cu->processor_id_low = kdev->processor_id_low;
+
cu->num_cu_per_array = cu_info.num_cu_per_sh;
cu->max_slots_scatch_cu = cu_info.max_scratch_slots_per_cu;
cu->num_banks = cu_info.num_shader_engines;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index 182eb67edbc5..4c06b233472f 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -370,6 +370,9 @@ struct kfd_dev {
/* Track per device allocated watch points. */
uint32_t alloc_watch_ids;
+
+ /* cu processor id base */
+ unsigned int processor_id_low;
};
struct kfd_ipc_obj;
--
2.25.1
next reply other threads:[~2022-10-26 9:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-26 9:03 Ma Jun [this message]
2022-10-26 9:03 ` [PATCH v2 2/2] drm/amdkfd: Fix the warning of array-index-out-of-bounds Ma Jun
2022-10-26 19:07 ` [PATCH v2 1/2] drm/amdkfd: Init the base cu processor id Felix Kuehling
2022-10-27 5:16 ` Ma, Jun
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