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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Nov 2022 21:14:00.8693 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6688dbd5-5047-4811-aa9b-08dace60cedd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT007.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6371 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stylon.wang@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com, qingqing.zhuo@amd.com, jdhillon , Rodrigo.Siqueira@amd.com, roman.li@amd.com, solomon.chiu@amd.com, Daniel Wheeler , Aurabindo.Pillai@amd.com, wayne.lin@amd.com, Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com, pavle.kotarac@amd.com Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" This DC patchset brings improvements in multiple areas. In summary, we have: * Program output transfer function when required * Fix arthmetic errror in MALL size caluclations for subvp * DCC Meta pitch used for MALL allocation * Debugfs entry to tell if connector is DPIA link * Use largest vready_offset in pipe group * Fixes race condition in DPIA Aux transfer Cc: Daniel Wheeler Alvin Lee (3): drm/amd/display: Retain phantom pipes when min transition into subvp drm/amd/display: Don't overwrite subvp pipe info in fast updates drm/amd/display: Fix DTBCLK disable requests and SRC_SEL programming Aric Cyr (1): drm/amd/display: 3.2.214 Dillon Varone (4): drm/amd/display: MALL SS calculations should iterate over all pipes for cursor drm/amd/display: Use DCC meta pitch for MALL allocation requirements drm/amd/display: Fix arithmetic error in MALL size calculations for subvp drm/amd/display: program output tf when required Dmytro Laktyushkin (1): drm/amd/display: set per pipe dppclk to 0 when dpp is off Stylon Wang (2): drm/amd/display: Fix race condition in DPIA AUX transfer drm/amd/display: Create debugfs to tell if connector is DPIA link Wesley Chalmers (1): drm/amd/display: Use the largest vready_offset in pipe group .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 151 +++++++++--------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 17 +- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 23 ++- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 10 +- .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc.c | 23 ++- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- drivers/gpu/drm/amd/display/dc/dc_stream.h | 11 ++ .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 30 +++- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 34 +++- .../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 6 +- .../drm/amd/display/dc/dcn32/dcn32_hwseq.c | 8 +- .../drm/amd/display/dc/dcn32/dcn32_resource.c | 66 +++++--- .../drm/amd/display/dc/dcn32/dcn32_resource.h | 13 +- .../display/dc/dcn32/dcn32_resource_helpers.c | 15 +- .../amd/display/dc/dcn321/dcn321_resource.c | 2 + .../drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 3 + .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 9 +- .../gpu/drm/amd/display/dc/inc/core_types.h | 4 +- 19 files changed, 277 insertions(+), 152 deletions(-) -- 2.34.1