From: jdhillon <jdhillon@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: stylon.wang@amd.com, Dillon Varone <Dillon.Varone@amd.com>,
Sunpeng.Li@amd.com, Harry.Wentland@amd.com,
qingqing.zhuo@amd.com, Jasdeep Dhillon <jdhillon@amd.com>,
Rodrigo.Siqueira@amd.com, roman.li@amd.com, solomon.chiu@amd.com,
Aurabindo.Pillai@amd.com, Alvin Lee <Alvin.Lee2@amd.com>,
wayne.lin@amd.com, Bhawanpreet.Lakha@amd.com,
agustin.gutierrez@amd.com, pavle.kotarac@amd.com
Subject: [PATCH 08/12] drm/amd/display: program output tf when required
Date: Thu, 24 Nov 2022 16:13:44 -0500 [thread overview]
Message-ID: <20221124211348.214136-9-jdhillon@amd.com> (raw)
In-Reply-To: <20221124211348.214136-1-jdhillon@amd.com>
From: Dillon Varone <Dillon.Varone@amd.com>
[Description]
Output transfer function must be programmed per pipe as part of a front end
update when the plane changes, or output transfer function changes for a
given plane.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index db57b17061ae..bc4a303cd864 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1741,7 +1741,10 @@ static void dcn20_program_pipe(
* only do gamma programming for powering on, internal memcmp to avoid
* updating on slave planes
*/
- if (pipe_ctx->update_flags.bits.enable || pipe_ctx->stream->update_flags.bits.out_tf)
+ if (pipe_ctx->update_flags.bits.enable ||
+ pipe_ctx->update_flags.bits.plane_changed ||
+ pipe_ctx->stream->update_flags.bits.out_tf ||
+ pipe_ctx->plane_state->update_flags.bits.output_tf_change)
hws->funcs.set_output_transfer_func(dc, pipe_ctx, pipe_ctx->stream);
/* If the pipe has been enabled or has a different opp, we
--
2.34.1
next prev parent reply other threads:[~2022-11-24 21:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-24 21:13 [PATCH 00/12] DC Patches November 28 2022 jdhillon
2022-11-24 21:13 ` [PATCH 01/12] drm/amd/display: Fix race condition in DPIA AUX transfer jdhillon
2022-11-24 21:13 ` [PATCH 02/12] drm/amd/display: Use the largest vready_offset in pipe group jdhillon
2022-11-24 21:13 ` [PATCH 03/12] drm/amd/display: Create debugfs to tell if connector is DPIA link jdhillon
2022-11-24 21:13 ` [PATCH 04/12] drm/amd/display: MALL SS calculations should iterate over all pipes for cursor jdhillon
2022-11-24 21:13 ` [PATCH 05/12] drm/amd/display: Use DCC meta pitch for MALL allocation requirements jdhillon
2022-11-24 21:13 ` [PATCH 06/12] drm/amd/display: Retain phantom pipes when min transition into subvp jdhillon
2022-11-24 21:13 ` [PATCH 07/12] drm/amd/display: Fix arithmetic error in MALL size calculations for subvp jdhillon
2022-11-24 21:13 ` jdhillon [this message]
2022-11-24 21:13 ` [PATCH 09/12] drm/amd/display: Don't overwrite subvp pipe info in fast updates jdhillon
2022-11-24 21:13 ` [PATCH 10/12] drm/amd/display: Fix DTBCLK disable requests and SRC_SEL programming jdhillon
2022-11-24 21:13 ` [PATCH 11/12] drm/amd/display: set per pipe dppclk to 0 when dpp is off jdhillon
2022-11-24 21:13 ` [PATCH 12/12] drm/amd/display: 3.2.214 jdhillon
2022-11-25 17:30 ` [PATCH 00/12] DC Patches November 28 2022 Wheeler, Daniel
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