From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Alex Deucher <alexander.deucher@amd.com>
Subject: [PATCH 1/7] drm/amdgpu/gmc9: don't touch gfxhub registers during S0ix
Date: Wed, 14 Dec 2022 17:16:48 -0500 [thread overview]
Message-ID: <20221214221654.1625194-2-alexander.deucher@amd.com> (raw)
In-Reply-To: <20221214221654.1625194-1-alexander.deucher@amd.com>
gfxhub registers are part of gfx IP and should not need to be
changed. Doing so without disabling gfxoff can hang the gfx IP.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 26 ++++++++++++++++++++------
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 08d6cf79fb15..5f07c85bf729 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -484,6 +484,9 @@ static int gmc_v9_0_vm_fault_interrupt_state(struct amdgpu_device *adev,
for (i = 0; i < 16; i++) {
reg = hub->vm_context0_cntl + i;
+ if (adev->in_s0ix && (j == AMDGPU_GFXHUB_0))
+ continue;
+
if (j == AMDGPU_GFXHUB_0)
tmp = RREG32_SOC15_IP(GC, reg);
else
@@ -504,6 +507,9 @@ static int gmc_v9_0_vm_fault_interrupt_state(struct amdgpu_device *adev,
for (i = 0; i < 16; i++) {
reg = hub->vm_context0_cntl + i;
+ if (adev->in_s0ix && (j == AMDGPU_GFXHUB_0))
+ continue;
+
if (j == AMDGPU_GFXHUB_0)
tmp = RREG32_SOC15_IP(GC, reg);
else
@@ -1862,9 +1868,12 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
}
amdgpu_gtt_mgr_recover(&adev->mman.gtt_mgr);
- r = adev->gfxhub.funcs->gart_enable(adev);
- if (r)
- return r;
+
+ if (!adev->in_s0ix) {
+ r = adev->gfxhub.funcs->gart_enable(adev);
+ if (r)
+ return r;
+ }
r = adev->mmhub.funcs->gart_enable(adev);
if (r)
@@ -1911,11 +1920,15 @@ static int gmc_v9_0_hw_init(void *handle)
value = true;
if (!amdgpu_sriov_vf(adev)) {
- adev->gfxhub.funcs->set_fault_enable_default(adev, value);
+ if (!adev->in_s0ix)
+ adev->gfxhub.funcs->set_fault_enable_default(adev, value);
adev->mmhub.funcs->set_fault_enable_default(adev, value);
}
- for (i = 0; i < adev->num_vmhubs; ++i)
+ for (i = 0; i < adev->num_vmhubs; ++i) {
+ if (adev->in_s0ix && (i == AMDGPU_GFXHUB_0))
+ continue;
gmc_v9_0_flush_gpu_tlb(adev, 0, i, 0);
+ }
if (adev->umc.funcs && adev->umc.funcs->init_registers)
adev->umc.funcs->init_registers(adev);
@@ -1939,7 +1952,8 @@ static int gmc_v9_0_hw_init(void *handle)
*/
static void gmc_v9_0_gart_disable(struct amdgpu_device *adev)
{
- adev->gfxhub.funcs->gart_disable(adev);
+ if (!adev->in_s0ix)
+ adev->gfxhub.funcs->gart_disable(adev);
adev->mmhub.funcs->gart_disable(adev);
}
--
2.38.1
next prev parent reply other threads:[~2022-12-14 22:17 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-14 22:16 [PATCH 0/7] Improvde S0ix stability Alex Deucher
2022-12-14 22:16 ` Alex Deucher [this message]
2022-12-15 7:45 ` [PATCH 1/7] drm/amdgpu/gmc9: don't touch gfxhub registers during S0ix Christian König
2022-12-15 22:08 ` Alex Deucher
2022-12-14 22:16 ` [PATCH 2/7] drm/amdgpu/gmc10: " Alex Deucher
2022-12-14 22:16 ` [PATCH 3/7] drm/amdgpu/gmc11: " Alex Deucher
2022-12-14 22:16 ` [PATCH 4/7] drm/amdgpu: don't mess with SDMA clock or powergating in S0ix Alex Deucher
2022-12-14 22:16 ` [PATCH 5/7] drm/amdgpu: for S0ix, skip SMDA 5.x+ suspend/resume Alex Deucher
2022-12-15 15:04 ` Bhardwaj, Rajneesh
2022-12-15 15:58 ` Alex Deucher
2022-12-14 22:16 ` [PATCH 6/7] Revert "drm/amdgpu: disallow gfxoff until GC IP blocks complete s2idle resume" Alex Deucher
2022-12-14 22:16 ` [PATCH 7/7] Revert "drm/amdgpu: force exit gfxoff on sdma resume for rmb s0ix" Alex Deucher
-- strict thread matches above, loose matches on Subject: below --
2022-12-15 22:10 [PATCH 0/7 v2] Improve S0ix stability Alex Deucher
2022-12-15 22:10 ` [PATCH 1/7] drm/amdgpu/gmc9: don't touch gfxhub registers during S0ix Alex Deucher
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