From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Sasha Levin <sashal@kernel.org>,
Dillon.Varone@amd.com, David.Galiffi@amd.com,
Tom Chung <chiahsuan.chung@amd.com>,
amd-gfx@lists.freedesktop.org, sunpeng.li@amd.com,
airlied@gmail.com, dri-devel@lists.freedesktop.org,
Xinhui.Pan@amd.com, Rodrigo.Siqueira@amd.com, samson.tam@amd.com,
Daniel Wheeler <daniel.wheeler@amd.com>,
rdunlap@infradead.org, Alvin Lee <Alvin.Lee2@amd.com>,
daniel@ffwll.ch, George Shen <george.shen@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
jun.lei@amd.com, harry.wentland@amd.com,
christian.koenig@amd.com
Subject: [PATCH AUTOSEL 6.1 45/85] drm/amd/display: Workaround to increase phantom pipe vactive in pipesplit
Date: Sun, 18 Dec 2022 11:01:02 -0500 [thread overview]
Message-ID: <20221218160142.925394-45-sashal@kernel.org> (raw)
In-Reply-To: <20221218160142.925394-1-sashal@kernel.org>
From: George Shen <george.shen@amd.com>
[ Upstream commit 5b8f9deaf3b6badfc0da968e6e07ceabd19700b6 ]
[Why]
Certain high resolution displays exhibit DCC line corruption with SubVP
enabled. This is likely due to insufficient DCC meta data buffered
immediately after the mclk switch.
[How]
Add workaround to increase phantom pipe vactive height by
meta_row_height number of lines, thus increasing the amount of meta data
buffered immediately after mclk switch finishes.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index 2abe3967f7fb..d1bf49d207de 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -531,9 +531,11 @@ void dcn32_set_phantom_stream_timing(struct dc *dc,
unsigned int i, pipe_idx;
struct pipe_ctx *pipe;
uint32_t phantom_vactive, phantom_bp, pstate_width_fw_delay_lines;
+ unsigned int num_dpp;
unsigned int vlevel = context->bw_ctx.dml.vba.VoltageLevel;
unsigned int dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb];
unsigned int socclk = context->bw_ctx.dml.vba.SOCCLKPerState[vlevel];
+ struct vba_vars_st *vba = &context->bw_ctx.dml.vba;
dc_assert_fp_enabled();
@@ -569,6 +571,11 @@ void dcn32_set_phantom_stream_timing(struct dc *dc,
phantom_vactive = get_subviewport_lines_needed_in_mall(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx) +
pstate_width_fw_delay_lines + dc->caps.subvp_swath_height_margin_lines;
+ // W/A for DCC corruption with certain high resolution timings.
+ // Determing if pipesplit is used. If so, add meta_row_height to the phantom vactive.
+ num_dpp = vba->NoOfDPP[vba->VoltageLevel][vba->maxMpcComb][vba->pipe_plane[pipe_idx]];
+ phantom_vactive += num_dpp > 1 ? vba->meta_row_height[vba->pipe_plane[pipe_idx]] : 0;
+
// For backporch of phantom pipe, use vstartup of the main pipe
phantom_bp = get_vstartup(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx);
--
2.35.1
next prev parent reply other threads:[~2022-12-18 16:04 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221218160142.925394-1-sashal@kernel.org>
2022-12-18 16:00 ` [PATCH AUTOSEL 6.1 12/85] drm/amd/display: skip commit minimal transition state Sasha Levin
2022-12-18 16:00 ` [PATCH AUTOSEL 6.1 13/85] drm/amd/display: prevent memory leak Sasha Levin
2022-12-18 16:00 ` [PATCH AUTOSEL 6.1 15/85] Revert "drm/amd/display: Limit max DSC target bpp for specific monitors" Sasha Levin
2022-12-18 16:00 ` [PATCH AUTOSEL 6.1 31/85] drm/amdgpu: Fix type of second parameter in trans_msg() callback Sasha Levin
2022-12-18 16:00 ` [PATCH AUTOSEL 6.1 32/85] drm/amdgpu: Fix type of second parameter in odn_edit_dpm_table() callback Sasha Levin
2022-12-18 16:00 ` [PATCH AUTOSEL 6.1 36/85] drm/amd/display: Use min transition for SubVP into MPO Sasha Levin
2022-12-18 16:00 ` [PATCH AUTOSEL 6.1 37/85] drm/amd/display: Disable DRR actions during state commit Sasha Levin
2022-12-18 16:01 ` Sasha Levin [this message]
2022-12-18 16:01 ` [PATCH AUTOSEL 6.1 46/85] drm/amd/display: fix array index out of bound error in bios parser Sasha Levin
2022-12-18 16:01 ` [PATCH AUTOSEL 6.1 54/85] drm/amd/display: Fix display corruption w/ VSR enable Sasha Levin
2022-12-18 16:01 ` [PATCH AUTOSEL 6.1 64/85] drm/amdgpu: Fix potential double free and null pointer dereference Sasha Levin
2022-12-18 16:01 ` [PATCH AUTOSEL 6.1 65/85] drm/amd/display: Use the largest vready_offset in pipe group Sasha Levin
2022-12-18 16:01 ` [PATCH AUTOSEL 6.1 66/85] drm/amd/display: Fix DTBCLK disable requests and SRC_SEL programming Sasha Levin
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