From: jdhillon <jdhillon@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: "Leo Li" <sunpeng.li@amd.com>,
" Harry Wentland" <harry.wentland@amd.com>,
"Rodrigo Siqueira" <Rodrigo.Siqueira@amd.com>,
dri-devel@lists.freedesktop.org,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Jasdeep Dhillon" <jdhillon@amd.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
"David Airlie" <airlied@gmail.com>,
"Christian König" <christian.koenig@amd.com>
Subject: [PATCH] drm: Rename headers to match DP2.1 spec
Date: Mon, 6 Feb 2023 14:37:08 -0500 [thread overview]
Message-ID: <20230206193708.82187-1-jdhillon@amd.com> (raw)
This patch changes the headers defined in drm_dp.h to match
the DP 2.1 spec.
Signed-off-by: Jasdeep Dhillon <jdhillon@amd.com>
---
drivers/gpu/drm/tegra/dp.c | 2 +-
include/drm/display/drm_dp.h | 13 +++++++------
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/tegra/dp.c b/drivers/gpu/drm/tegra/dp.c
index 08fbd8f151a1..f33e468ece0a 100644
--- a/drivers/gpu/drm/tegra/dp.c
+++ b/drivers/gpu/drm/tegra/dp.c
@@ -499,7 +499,7 @@ static int drm_dp_link_apply_training(struct drm_dp_link *link)
for (i = 0; i < lanes; i++)
values[i / 2] |= DP_LANE_POST_CURSOR(i, pc[i]);
- err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_1_SET2, values,
+ err = drm_dp_dpcd_write(aux, DP_LINK_SQUARE_PATTERN, values,
DIV_ROUND_UP(lanes, 2));
if (err < 0) {
DRM_ERROR("failed to set post-cursor: %d\n", err);
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index ed10e6b6f99d..2093c1f8d8e0 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -641,12 +641,11 @@
# define DP_LINK_QUAL_PATTERN_CUSTOM 0x40
# define DP_LINK_QUAL_PATTERN_SQUARE 0x48
-#define DP_TRAINING_LANE0_1_SET2 0x10f
-#define DP_TRAINING_LANE2_3_SET2 0x110
-# define DP_LANE02_POST_CURSOR2_SET_MASK (3 << 0)
-# define DP_LANE02_MAX_POST_CURSOR2_REACHED (1 << 2)
-# define DP_LANE13_POST_CURSOR2_SET_MASK (3 << 4)
-# define DP_LANE13_MAX_POST_CURSOR2_REACHED (1 << 6)
+#define DP_LINK_SQUARE_PATTERN 0x10f
+#define DP_CABLE_ATTRIBUTES_UPDATED_BY_DPTX 0x110
+# define DP_UHBR10_20_CAPABILITY (3 << 0)
+# define DP_UHBR13_5_CAPABILITY (1 << 2)
+# define DP_CABLE_TYPE (7 << 3)
#define DP_MSTM_CTRL 0x111 /* 1.2 */
# define DP_MST_EN (1 << 0)
@@ -1127,6 +1126,8 @@
# define DP_128B132B_TRAINING_AUX_RD_INTERVAL_32_MS 0x05
# define DP_128B132B_TRAINING_AUX_RD_INTERVAL_64_MS 0x06
+#define DP_CABLE_ATTRIBUTES_UPDATED_BY_DPRX 0x2217 /* 2.0 */
+
#define DP_TEST_264BIT_CUSTOM_PATTERN_7_0 0x2230
#define DP_TEST_264BIT_CUSTOM_PATTERN_263_256 0x2250
--
2.34.1
next reply other threads:[~2023-02-06 19:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-06 19:37 jdhillon [this message]
2023-02-08 12:05 ` [PATCH] drm: Rename headers to match DP2.1 spec Thierry Reding
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