From: Alex Deucher <alexander.deucher@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Alex Deucher <alexander.deucher@amd.com>, Le Ma <le.ma@amd.com>,
Lijo Lazar <lijo.lazar@amd.com>
Subject: [PATCH 3/6] drm/amdgpu: Skip halting RLC on GFX v9.4.3
Date: Tue, 9 May 2023 18:22:34 -0400 [thread overview]
Message-ID: <20230509222237.478097-3-alexander.deucher@amd.com> (raw)
In-Reply-To: <20230509222237.478097-1-alexander.deucher@amd.com>
From: Lijo Lazar <lijo.lazar@amd.com>
RLC-PMFW handshake happens periodically when GFXCLK DPM is enabled and
halting RLC may cause unexpected results. Avoid halting RLC from driver
side.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 23 +++++++----------------
1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 7ef2c9b515ef..6cde05421a10 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -1256,21 +1256,20 @@ static int gfx_v9_4_3_xcc_rlc_resume(struct amdgpu_device *adev, int xcc_id)
{
int r;
- gfx_v9_4_3_xcc_rlc_stop(adev, xcc_id);
-
- /* disable CG */
- WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, 0);
-
- gfx_v9_4_3_xcc_init_pg(adev, xcc_id);
-
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
+ gfx_v9_4_3_xcc_rlc_stop(adev, xcc_id);
/* legacy rlc firmware loading */
r = gfx_v9_4_3_xcc_rlc_load_microcode(adev, xcc_id);
if (r)
return r;
+ gfx_v9_4_3_xcc_rlc_start(adev, xcc_id);
}
- gfx_v9_4_3_xcc_rlc_start(adev, xcc_id);
+ amdgpu_gfx_rlc_enter_safe_mode(adev, xcc_id);
+ /* disable CG */
+ WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_CGCG_CGLS_CTRL, 0);
+ gfx_v9_4_3_xcc_init_pg(adev, xcc_id);
+ amdgpu_gfx_rlc_exit_safe_mode(adev, xcc_id);
return 0;
}
@@ -1967,14 +1966,6 @@ static void gfx_v9_4_3_xcc_fini(struct amdgpu_device *adev, int xcc_id)
gfx_v9_4_3_xcc_kcq_fini_register(adev, xcc_id);
gfx_v9_4_3_xcc_cp_enable(adev, false, xcc_id);
-
- /* Skip suspend with A+A reset */
- if (adev->gmc.xgmi.connected_to_cpu && amdgpu_in_reset(adev)) {
- dev_dbg(adev->dev, "Device in reset. Skipping RLC halt\n");
- return;
- }
-
- gfx_v9_4_3_xcc_rlc_stop(adev, xcc_id);
}
static int gfx_v9_4_3_hw_init(void *handle)
--
2.40.1
next prev parent reply other threads:[~2023-05-09 22:23 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-09 22:22 [PATCH 1/6] drm/amdkfd: Increase queue number per process to 255 on GFX9.4.3 Alex Deucher
2023-05-09 22:22 ` [PATCH 2/6] drm/amdgpu: Fix register accesses in GFX v9.4.3 Alex Deucher
2023-05-09 22:22 ` Alex Deucher [this message]
2023-05-09 22:22 ` [PATCH 4/6] drm/amdkfd: Move pgmap to amdgpu_kfd_dev structure Alex Deucher
2023-05-09 22:22 ` [PATCH 5/6] drm/amdgpu: Enable NPS4 CPX mode Alex Deucher
2023-05-09 22:22 ` [PATCH 6/6] drm/amdgpu: For GFX 9.4.3 APU fix vram_usage value Alex Deucher
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