From: Samir Dhume <samir.dhume@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: zhigang.luo@amd.com, guchun.chen@amd.com, gavin.wan@amd.com,
lijo.lazar@amd.com, Samir Dhume <samir.dhume@amd.com>,
hawking.zhang@amd.com
Subject: [PATCH 7/7] drm/amdgpu/vcn: change end doorbell index for vcn_v4_0_3
Date: Thu, 20 Jul 2023 15:19:40 -0400 [thread overview]
Message-ID: <20230720191940.780187-7-samir.dhume@amd.com> (raw)
In-Reply-To: <20230720191940.780187-1-samir.dhume@amd.com>
For sriov, doorbell index for vcn0 for AID needs to be on
32 byte boundary so we need to move the vcn end doorbell
Signed-off-by: Samir Dhume <samir.dhume@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index f637574644c0..4a279960cd21 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -330,14 +330,14 @@ typedef enum _AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1 {
AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_END = 0x19F,
/* IH: 0x1A0 ~ 0x1AF */
AMDGPU_DOORBELL_LAYOUT1_IH = 0x1A0,
- /* VCN: 0x1B0 ~ 0x1D4 */
+ /* VCN: 0x1B0 ~ 0x1E8 */
AMDGPU_DOORBELL_LAYOUT1_VCN_START = 0x1B0,
- AMDGPU_DOORBELL_LAYOUT1_VCN_END = 0x1D4,
+ AMDGPU_DOORBELL_LAYOUT1_VCN_END = 0x1E8,
AMDGPU_DOORBELL_LAYOUT1_FIRST_NON_CP = AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_START,
AMDGPU_DOORBELL_LAYOUT1_LAST_NON_CP = AMDGPU_DOORBELL_LAYOUT1_VCN_END,
- AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT = 0x1D4,
+ AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT = 0x1E8,
AMDGPU_DOORBELL_LAYOUT1_INVALID = 0xFFFF
} AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1;
--
2.34.1
next prev parent reply other threads:[~2023-07-20 19:20 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-20 19:19 [PATCH 1/7] drm/amdgpu/vcn: Add MMSCH v4_0_3 support for sriov Samir Dhume
2023-07-20 19:19 ` [PATCH 2/7] drm/amdgpu/vcn : Skip vcn power-gating change " Samir Dhume
2023-07-20 19:19 ` [PATCH 3/7] drm/amdgpu/vcn: sriov support for vcn_v4_0_3 Samir Dhume
2023-07-21 13:05 ` Lazar, Lijo
2023-07-20 19:19 ` [PATCH 4/7] drm/amdgpu/vcn: mmsch_v3_0_4 requires doorbell on 32 byte boundary Samir Dhume
2023-07-20 19:19 ` [PATCH 5/7] drm/amdgpu/jpeg: sriov support for jpeg_v4_0_3 Samir Dhume
2023-07-20 19:19 ` [PATCH 6/7] drm/amdgpu/jpeg: mmsch_v3_0_4 requires doorbell on 32 byte boundary Samir Dhume
2023-07-21 13:30 ` Lazar, Lijo
2023-07-20 19:19 ` Samir Dhume [this message]
-- strict thread matches above, loose matches on Subject: below --
2023-07-17 15:58 [PATCH 1/7] drm/amdgpu/vcn: Add MMSCH v4_0_3 support for sriov Samir Dhume
2023-07-17 15:58 ` [PATCH 7/7] drm/amdgpu/vcn: change end doorbell index for vcn_v4_0_3 Samir Dhume
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