From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: rdunlap@infradead.org, lijo.lazar@amd.com,
dri-devel@lists.freedesktop.org, hamza.mahfooz@amd.com,
Jun.Lei@amd.com, airlied@gmail.com,
Sasha Levin <sashal@kernel.org>,
austin.zheng@amd.com, Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
amd-gfx@lists.freedesktop.org,
Aurabindo Pillai <aurabindo.pillai@amd.com>,
Nevenko.Stupar@amd.com, Alvin.Lee2@amd.com, George.Shen@amd.com,
harry.wentland@amd.com, stylon.wang@amd.com,
srinivasan.shanmugam@amd.com, sunpeng.li@amd.com,
shiwu.zhang@amd.com, hdegoede@redhat.com, hersenxs.wu@amd.com,
Dillon.Varone@amd.com, qingqing.zhuo@amd.com, Xinhui.Pan@amd.com,
daniel@ffwll.ch, wayne.lin@amd.com,
Alex Deucher <alexander.deucher@amd.com>,
christian.koenig@amd.com
Subject: [PATCH AUTOSEL 6.4 08/58] Revert "drm/amd/display: disable SubVP + DRR to prevent underflow"
Date: Sun, 23 Jul 2023 21:12:36 -0400 [thread overview]
Message-ID: <20230724011338.2298062-8-sashal@kernel.org> (raw)
In-Reply-To: <20230724011338.2298062-1-sashal@kernel.org>
From: Aurabindo Pillai <aurabindo.pillai@amd.com>
[ Upstream commit f38129bb081758176dd78304faaee95007fb8838 ]
This reverts commit 80c6d6804f31451848a3956a70c2bcb1f07cfcb0.
The orignal commit was intended as a workaround to prevent underflow and
flickering when using one normal monitor and the other high refresh rate
monitor (> 120Hz).
This patch is being reverted in favour of a software solution to enable
SubVP+DRR
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 -----
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 ----
drivers/gpu/drm/amd/include/amd_shared.h | 1 -
3 files changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7acd73e5004fb..80756c7b92a54 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1646,11 +1646,6 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
if (amdgpu_dc_feature_mask & DC_DISABLE_LTTPR_DP2_0)
init_data.flags.allow_lttpr_non_transparent_mode.bits.DP2_0 = true;
- /* Disable SubVP + DRR config by default */
- init_data.flags.disable_subvp_drr = true;
- if (amdgpu_dc_feature_mask & DC_ENABLE_SUBVP_DRR)
- init_data.flags.disable_subvp_drr = false;
-
init_data.flags.seamless_boot_edp_requested = false;
if (check_seamless_boot_capability(adev)) {
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index 0c4c3208def17..d7eca24bd09d2 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -880,10 +880,6 @@ static bool subvp_drr_schedulable(struct dc *dc, struct dc_state *context, struc
int16_t stretched_drr_us = 0;
int16_t drr_stretched_vblank_us = 0;
int16_t max_vblank_mallregion = 0;
- const struct dc_config *config = &dc->config;
-
- if (config->disable_subvp_drr)
- return false;
// Find SubVP pipe
for (i = 0; i < dc->res_pool->pipe_count; i++) {
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
index e4a22c68517d1..f175e65b853a0 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -240,7 +240,6 @@ enum DC_FEATURE_MASK {
DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default
DC_PSR_ALLOW_SMU_OPT = (1 << 7), //0x80, disabled by default
DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), //0x100, disabled by default
- DC_ENABLE_SUBVP_DRR = (1 << 9), // 0x200, disabled by default
};
enum DC_DEBUG_MASK {
--
2.39.2
next prev parent reply other threads:[~2023-07-24 1:14 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-24 1:12 [PATCH AUTOSEL 6.4 01/58] drm/amd/display: Do not set drr on pipe commit Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 02/58] drm/amd/display: Update DTBCLK for DCN32 Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 04/58] drm/amdgpu: fix calltrace warning in amddrm_buddy_fini Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 05/58] drm/radeon: Fix integer overflow in radeon_cs_parser_init Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 06/58] drm/amdgpu: Fix integer overflow in amdgpu_cs_pass1 Sasha Levin
2023-07-24 1:12 ` [PATCH AUTOSEL 6.4 07/58] drm/amdgpu: fix memory leak in mes self test Sasha Levin
2023-07-24 1:12 ` Sasha Levin [this message]
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 38/58] drm/amdgpu: install stub fence into potential unused fence pointers Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 39/58] drm/amd/display: Remove v_startup workaround for dcn3+ Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 40/58] drm/amd/display: Trigger DIO FIFO resync on commit streams Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 41/58] drm/amd/display: Apply 60us prefetch for DCFCLK <= 300Mhz Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 42/58] Revert "drm/amd/display: Do not set drr on pipe commit" Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 44/58] drm/amd/pm: Fill metrics data for SMUv13.0.6 Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 45/58] drm/amdgpu: unmap and remove csa_va properly Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 48/58] drm/amd/display: Skip DPP DTO update if root clock is gated Sasha Levin
2023-07-24 1:13 ` [PATCH AUTOSEL 6.4 49/58] drm/amd/display: Enable dcn314 DPP RCO Sasha Levin
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