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CAT:NONE; SFS:(13230031)(4636009)(39860400002)(136003)(376002)(396003)(346002)(451199024)(82310400011)(1800799009)(186009)(36840700001)(40470700004)(46966006)(70586007)(70206006)(54906003)(5660300002)(44832011)(2616005)(41300700001)(316002)(6916009)(2906002)(478600001)(86362001)(4326008)(8936002)(8676002)(81166007)(6666004)(40460700003)(356005)(82740400003)(426003)(336012)(1076003)(36756003)(83380400001)(36860700001)(26005)(16526019)(40480700001)(47076005)(16060500005)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Aug 2023 16:04:24.8099 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cf581a87-82d8-49a6-53c3-08dba3f29f0a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB8050 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stylon.wang@amd.com, Sunpeng.Li@amd.com, Harry.Wentland@amd.com, qingqing.zhuo@amd.com, Rodrigo.Siqueira@amd.com, roman.li@amd.com, Wenjing Liu , Daniel Wheeler , solomon.chiu@amd.com, jerry.zuo@amd.com, Aurabindo.Pillai@amd.com, hamza.mahfooz@amd.com, wayne.lin@amd.com, Jun Lei , Bhawanpreet.Lakha@amd.com, agustin.gutierrez@amd.com, pavle.kotarac@amd.com Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Wenjing Liu Adding detail comments describing the problem we are solving with add plane function. Reviewed-by: Jun Lei Acked-by: Hamza Mahfooz Signed-off-by: Wenjing Liu --- .../gpu/drm/amd/display/dc/core/dc_resource.c | 91 ++++++++++++++----- 1 file changed, 70 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index f7b51aca6020..e4fb76d8e603 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1828,6 +1828,30 @@ static int acquire_first_split_pipe( return UNABLE_TO_SPLIT; } +/* For each OPP head of an OTG master, add top plane at plane index 0. + * + * In the following example, the stream has 2 ODM slices without a top plane. + * By adding a plane 0 to OPP heads, we are configuring our hardware to render + * plane 0 by using each OPP head's DPP. + * + * Inter-pipe Relation (Before Adding Plane) + * __________________________________________________ + * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | + * | | | slice 0 | | + * | 0 | |blank ----ODM----------- | + * | | | slice 1 | | | + * | 1 | |blank ---- | | + * |________|_______________|___________|_____________| + * + * Inter-pipe Relation (After Adding Plane) + * __________________________________________________ + * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | + * | | plane 0 | slice 0 | | + * | 0 | -------------------------ODM----------- | + * | | plane 0 | slice 1 | | | + * | 1 | ------------------------- | | + * |________|_______________|___________|_____________| + */ static bool add_plane_to_opp_head_pipes(struct pipe_ctx *otg_master_pipe, struct dc_plane_state *plane_state, struct dc_state *context) @@ -1846,24 +1870,36 @@ static bool add_plane_to_opp_head_pipes(struct pipe_ctx *otg_master_pipe, return true; } -static void insert_secondary_dpp_pipe_with_plane(struct pipe_ctx *opp_head_pipe, - struct pipe_ctx *sec_pipe, struct dc_plane_state *plane_state) -{ - struct pipe_ctx *tail_pipe = get_tail_pipe(opp_head_pipe); - - tail_pipe->bottom_pipe = sec_pipe; - sec_pipe->top_pipe = tail_pipe; - if (tail_pipe->prev_odm_pipe) { - ASSERT(tail_pipe->prev_odm_pipe->bottom_pipe); - sec_pipe->prev_odm_pipe = tail_pipe->prev_odm_pipe->bottom_pipe; - tail_pipe->prev_odm_pipe->bottom_pipe->next_odm_pipe = sec_pipe; - } - sec_pipe->plane_state = plane_state; -} - -/* for each opp head pipe of an otg master pipe, acquire a secondary dpp pipe - * and add the plane. So the plane is added to all MPC blend trees associated - * with the otg master pipe. +/* For each OPP head of an OTG master, acquire a secondary DPP pipe and add + * the plane. So the plane is added to all ODM slices associated with the OTG + * master pipe in the bottom layer. + * + * In the following example, the stream has 2 ODM slices and a top plane 0. + * By acquiring secondary DPP pipes and adding a plane 1, we are configuring our + * hardware to render the plane 1 by acquiring a new pipe for each ODM slice and + * render plane 1 using new pipes' DPP in the Z axis below plane 0. + * + * Inter-pipe Relation (Before Adding Plane) + * __________________________________________________ + * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | + * | | plane 0 | slice 0 | | + * | 0 | -------------------------ODM----------- | + * | | plane 0 | slice 1 | | | + * | 1 | ------------------------- | | + * |________|_______________|___________|_____________| + * + * Inter-pipe Relation (After Acquiring and Adding Plane) + * __________________________________________________ + * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | + * | | plane 0 | slice 0 | | + * | 0 | -------------MPC---------ODM----------- | + * | | plane 1 | | | | | + * | 2 | ------------- | | | | + * | | plane 0 | slice 1 | | | + * | 1 | -------------MPC--------- | | + * | | plane 1 | | | | + * | 3 | ------------- | | | + * |________|_______________|___________|_____________| */ static bool acquire_secondary_dpp_pipes_and_add_plane( struct pipe_ctx *otg_master_pipe, @@ -1872,7 +1908,7 @@ static bool acquire_secondary_dpp_pipes_and_add_plane( struct dc_state *cur_ctx, struct resource_pool *pool) { - struct pipe_ctx *opp_head_pipe, *sec_pipe; + struct pipe_ctx *opp_head_pipe, *sec_pipe, *tail_pipe; if (!pool->funcs->acquire_free_pipe_as_secondary_dpp_pipe) return false; @@ -1897,8 +1933,21 @@ static bool acquire_secondary_dpp_pipes_and_add_plane( if (!sec_pipe) return false; - insert_secondary_dpp_pipe_with_plane(opp_head_pipe, sec_pipe, - plane_state); + sec_pipe->plane_state = plane_state; + + /* establish pipe relationship */ + tail_pipe = get_tail_pipe(opp_head_pipe); + tail_pipe->bottom_pipe = sec_pipe; + sec_pipe->top_pipe = tail_pipe; + sec_pipe->bottom_pipe = NULL; + if (tail_pipe->prev_odm_pipe) { + ASSERT(tail_pipe->prev_odm_pipe->bottom_pipe); + sec_pipe->prev_odm_pipe = tail_pipe->prev_odm_pipe->bottom_pipe; + tail_pipe->prev_odm_pipe->bottom_pipe->next_odm_pipe = sec_pipe; + } else { + sec_pipe->prev_odm_pipe = NULL; + } + opp_head_pipe = opp_head_pipe->next_odm_pipe; } return true; -- 2.41.0