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Mon, 4 Mar 2024 03:16:17 -0600 From: To: CC: , , , Jesse Zhang , Jesse Zhang Subject: [PATCH] drm/amdgpu : remove unused code Date: Mon, 4 Mar 2024 17:16:17 +0800 Message-ID: <20240304091617.534109-1-jesse.zhang@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: jesse.zhang@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3C:EE_|CH3PR12MB7522:EE_ X-MS-Office365-Filtering-Correlation-Id: 26d6b6b2-a4a3-4783-9706-08dc3c2bc434 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: k87HF7634voadvsJprhl4HVWYCxCBiyDsrCnlOwgz0nH+nDgN0nTwa9zsCk4fTS01bcaNmXQgtj4MBcDxgv1BRdBvc8Nm0K/jhA+yAm9oS2rqSK1uWtml6ES/KoCvKPoEcEUxVfKVQo8NBkPrpJqOtD22xvO0bf1Nn+bkAusHNVI4vt2sC/MZxTQz1FcWedaR13t24bNlvZhe92A3n7pdLFrgPMWHVe0620xglh/9KMbNJfPPAF5ON0k1OXakKSAp+ELF1hk6HAnRYLqUHol3LhuFjTAxSy3L59j1DzABbi5vZPadHxGjBTHMjpILHi6QpZazOubSsihKIPJHM7YadfnJFK9G55w4wa06qkSpbqDqLrO9Elpx8vLYEsfBT1NeXDXd+8wQHJbRad84uiFwc3VOzbJPT0uhkWZPWGcoc7UkNPXW3MmJB8uXVxy2Rhir3gjELaWhalXtS1ugjIUEFr7F9qCSmMzEt/LFnO98YfoxSE8G0WqasygOEYeoGlFv1lNTq73CvccXT5ElQ9k9Pc+olzYKdVxvXZdV27cbps+zC0I9kl4/rZukcNe3K0JfmCUbumNc/wrLMFwN99wSGPHUmvQ6qXlIAEmTgti+LakucBxeBbT8Z58eRlmMOwCMldHtIx2gSO8blf7tICYek4z32XopuQpBLfaOUBLjxVUvhZ9TRjLGjWyDl7iP+X7I6ex6ThpAU2Fovo5iFlXUapeg+DiYgpNpJ9rL6rCY4Q8Gys6zdjPVKEBXbfXPljW X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(82310400014)(36860700004)(376005); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Mar 2024 09:16:25.1871 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 26d6b6b2-a4a3-4783-9706-08dc3c2bc434 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7522 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Jesse Zhang Remove the unused function - amdgpu_vm_pt_is_root_clean and remove the impossible condition v1: entries == 0 is not possible any more, so this condition could probably be removed (Felix) Signed-off-by: Jesse Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 - drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 61 ++++++----------------- 2 files changed, 16 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h index 7f95039bb37d..047ec1930d12 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h @@ -537,8 +537,6 @@ int amdgpu_vm_pt_create(struct amdgpu_device *adev, struct amdgpu_vm *vm, int level, bool immediate, struct amdgpu_bo_vm **vmbo, int32_t xcp_id); void amdgpu_vm_pt_free_root(struct amdgpu_device *adev, struct amdgpu_vm *vm); -bool amdgpu_vm_pt_is_root_clean(struct amdgpu_device *adev, - struct amdgpu_vm *vm); int amdgpu_vm_pde_update(struct amdgpu_vm_update_params *params, struct amdgpu_vm_bo_base *entry); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c index 8bce4da67131..7ecddb77b3ae 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c @@ -367,6 +367,7 @@ int amdgpu_vm_pt_clear(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct amdgpu_bo *bo = &vmbo->bo; uint64_t addr; int r, idx; + uint64_t value = 0, flags = 0; /* Figure out our place in the hierarchy */ if (ancestor->parent) { @@ -409,27 +410,24 @@ int amdgpu_vm_pt_clear(struct amdgpu_device *adev, struct amdgpu_vm *vm, addr = 0; - if (entries) { - uint64_t value = 0, flags = 0; - - if (adev->asic_type >= CHIP_VEGA10) { - if (level != AMDGPU_VM_PTB) { - /* Handle leaf PDEs as PTEs */ - flags |= AMDGPU_PDE_PTE; - amdgpu_gmc_get_vm_pde(adev, level, - &value, &flags); - } else { - /* Workaround for fault priority problem on GMC9 */ - flags = AMDGPU_PTE_EXECUTABLE; - } - } - r = vm->update_funcs->update(¶ms, vmbo, addr, 0, entries, - value, flags); - if (r) - goto exit; + if (adev->asic_type >= CHIP_VEGA10) { + if (level != AMDGPU_VM_PTB) { + /* Handle leaf PDEs as PTEs */ + flags |= AMDGPU_PDE_PTE; + amdgpu_gmc_get_vm_pde(adev, level, + &value, &flags); + } else { + /* Workaround for fault priority problem on GMC9 */ + flags = AMDGPU_PTE_EXECUTABLE; + } } + r = vm->update_funcs->update(¶ms, vmbo, addr, 0, entries, + value, flags); + if (r) + goto exit; + r = vm->update_funcs->commit(¶ms, NULL); exit: drm_dev_exit(idx); @@ -673,33 +671,6 @@ void amdgpu_vm_pt_free_root(struct amdgpu_device *adev, struct amdgpu_vm *vm) amdgpu_vm_pt_free_dfs(adev, vm, NULL, false); } -/** - * amdgpu_vm_pt_is_root_clean - check if a root PD is clean - * - * @adev: amdgpu_device pointer - * @vm: the VM to check - * - * Check all entries of the root PD, if any subsequent PDs are allocated, - * it means there are page table creating and filling, and is no a clean - * VM - * - * Returns: - * 0 if this VM is clean - */ -bool amdgpu_vm_pt_is_root_clean(struct amdgpu_device *adev, - struct amdgpu_vm *vm) -{ - enum amdgpu_vm_level root = adev->vm_manager.root_level; - unsigned int entries = amdgpu_vm_pt_num_entries(adev, root); - unsigned int i = 0; - - for (i = 0; i < entries; i++) { - if (to_amdgpu_bo_vm(vm->root.bo)->entries[i].bo) - return false; - } - return true; -} - /** * amdgpu_vm_pde_update - update a single level in the hierarchy * -- 2.25.1