From: "Mario Limonciello (AMD)" <superm1@kernel.org>
To: "Rafael J . Wysocki" <rafael@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: "Pavel Machek" <pavel@kernel.org>, "Len Brown" <lenb@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Danilo Krummrich" <dakr@kernel.org>,
"Christian König" <christian.koenig@amd.com>,
"James E . J . Bottomley" <James.Bottomley@HansenPartnership.com>,
"Martin K . Petersen" <martin.petersen@oracle.com>,
"Steven Rostedt" <rostedt@goodmis.org>,
linux-pm@vger.kernel.org (open list:HIBERNATION (aka Software
Suspend, aka swsusp)),
amd-gfx@lists.freedesktop.org (open list:RADEON and AMDGPU DRM
DRIVERS), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS),
linux-pci@vger.kernel.org (open list:PCI SUBSYSTEM),
linux-scsi@vger.kernel.org (open list:SCSI SUBSYSTEM),
linux-usb@vger.kernel.org (open list:USB SUBSYSTEM),
linux-trace-kernel@vger.kernel.org (open list:TRACING),
"AceLan Kao" <acelan.kao@canonical.com>,
"Kai-Heng Feng" <kaihengf@nvidia.com>,
"Mark Pearson" <mpearson-lenovo@squebb.ca>,
"Merthan Karakaş" <m3rthn.k@gmail.com>,
"Eric Naim" <dnaim@cachyos.org>,
"Mario Limonciello (AMD)" <superm1@kernel.org>
Subject: [PATCH v6 06/11] PCI: PM: Split out code from pci_pm_suspend_noirq() into helper
Date: Sun, 17 Aug 2025 21:00:56 -0500 [thread overview]
Message-ID: <20250818020101.3619237-7-superm1@kernel.org> (raw)
In-Reply-To: <20250818020101.3619237-1-superm1@kernel.org>
In order to unify suspend and hibernate codepaths without code duplication
the common code should be in common helpers. Move it from
pci_pm_suspend_noirq() into a helper. No intended functional changes.
Tested-by: Eric Naim <dnaim@cachyos.org>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
---
v5:
* Split from earlier patches
* Add tags
v4:
* https://lore.kernel.org/linux-pci/20250616175019.3471583-1-superm1@kernel.org/
---
drivers/pci/pci-driver.c | 81 +++++++++++++++++++++++++---------------
1 file changed, 51 insertions(+), 30 deletions(-)
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index f201d298d7173..571a3809f163a 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -762,6 +762,54 @@ static void pci_pm_complete(struct device *dev)
#endif /* !CONFIG_PM_SLEEP */
+#if defined(CONFIG_SUSPEND)
+/**
+ * pci_pm_suspend_noirq_common
+ * @pci_dev: pci device
+ * @skip_bus_pm: pointer to a boolean indicating whether to skip bus PM
+ *
+ * Prepare the device to go into a low power state by saving state and
+ * deciding whether to skip bus PM.
+ *
+ */
+static void pci_pm_suspend_noirq_common(struct pci_dev *pci_dev, bool *skip_bus_pm)
+{
+ if (!pci_dev->state_saved) {
+ pci_save_state(pci_dev);
+
+ /*
+ * If the device is a bridge with a child in D0 below it,
+ * it needs to stay in D0, so check skip_bus_pm to avoid
+ * putting it into a low-power state in that case.
+ */
+ if (!pci_dev->skip_bus_pm && pci_power_manageable(pci_dev))
+ pci_prepare_to_sleep(pci_dev);
+ }
+
+ pci_dbg(pci_dev, "PCI PM: Sleep power state: %s\n",
+ pci_power_name(pci_dev->current_state));
+
+ if (pci_dev->current_state == PCI_D0) {
+ pci_dev->skip_bus_pm = true;
+ /*
+ * Per PCI PM r1.2, table 6-1, a bridge must be in D0 if any
+ * downstream device is in D0, so avoid changing the power state
+ * of the parent bridge by setting the skip_bus_pm flag for it.
+ */
+ if (pci_dev->bus->self)
+ pci_dev->bus->self->skip_bus_pm = true;
+ }
+
+ if (pci_dev->skip_bus_pm && pm_suspend_no_platform()) {
+ pci_dbg(pci_dev, "PCI PM: Skipped\n");
+ *skip_bus_pm = true;
+ return;
+ }
+
+ pci_pm_set_unknown_state(pci_dev);
+}
+#endif /* CONFIG_SUSPEND */
+
#ifdef CONFIG_SUSPEND
static void pcie_pme_root_status_cleanup(struct pci_dev *pci_dev)
{
@@ -851,6 +899,7 @@ static int pci_pm_suspend_noirq(struct device *dev)
{
struct pci_dev *pci_dev = to_pci_dev(dev);
const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
+ bool skip_bus_pm = false;
if (dev_pm_skip_suspend(dev))
return 0;
@@ -881,38 +930,10 @@ static int pci_pm_suspend_noirq(struct device *dev)
}
}
- if (!pci_dev->state_saved) {
- pci_save_state(pci_dev);
-
- /*
- * If the device is a bridge with a child in D0 below it,
- * it needs to stay in D0, so check skip_bus_pm to avoid
- * putting it into a low-power state in that case.
- */
- if (!pci_dev->skip_bus_pm && pci_power_manageable(pci_dev))
- pci_prepare_to_sleep(pci_dev);
- }
-
- pci_dbg(pci_dev, "PCI PM: Suspend power state: %s\n",
- pci_power_name(pci_dev->current_state));
+ pci_pm_suspend_noirq_common(pci_dev, &skip_bus_pm);
- if (pci_dev->current_state == PCI_D0) {
- pci_dev->skip_bus_pm = true;
- /*
- * Per PCI PM r1.2, table 6-1, a bridge must be in D0 if any
- * downstream device is in D0, so avoid changing the power state
- * of the parent bridge by setting the skip_bus_pm flag for it.
- */
- if (pci_dev->bus->self)
- pci_dev->bus->self->skip_bus_pm = true;
- }
-
- if (pci_dev->skip_bus_pm && pm_suspend_no_platform()) {
- pci_dbg(pci_dev, "PCI PM: Skipped\n");
+ if (skip_bus_pm)
goto Fixup;
- }
-
- pci_pm_set_unknown_state(pci_dev);
/*
* Some BIOSes from ASUS have a bug: If a USB EHCI host controller's
--
2.43.0
next prev parent reply other threads:[~2025-08-18 2:01 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-18 2:00 [PATCH v6 00/11] Improvements to S5 power consumption Mario Limonciello (AMD)
2025-08-18 2:00 ` [PATCH v6 01/11] PM: Introduce new PMSG_POWEROFF event Mario Limonciello (AMD)
2025-08-18 2:00 ` [PATCH v6 02/11] scsi: Add PM_EVENT_POWEROFF into suspend callbacks Mario Limonciello (AMD)
2025-08-18 2:00 ` [PATCH v6 03/11] usb: sl811-hcd: " Mario Limonciello (AMD)
2025-08-18 2:00 ` [PATCH v6 04/11] USB: Pass PMSG_POWEROFF event to suspend_common() for poweroff with S4 flow Mario Limonciello (AMD)
2025-08-18 10:50 ` Oliver Neukum
2025-08-18 11:24 ` Mario Limonciello
2025-08-18 2:00 ` [PATCH v6 05/11] PCI: PM: Disable device wakeups when halting system through " Mario Limonciello (AMD)
2025-08-18 2:00 ` Mario Limonciello (AMD) [this message]
2025-08-18 2:00 ` [PATCH v6 07/11] PCI: PM: Run bridge power up actions as part of restore phase Mario Limonciello (AMD)
2025-08-18 2:00 ` [PATCH v6 08/11] PCI: PM: Use pci_power_manageable() in pci_pm_poweroff_noirq() Mario Limonciello (AMD)
2025-08-18 2:00 ` [PATCH v6 09/11] PCI: Put PCIe bridges with downstream devices into D3 at hibernate Mario Limonciello (AMD)
2025-08-18 2:01 ` [PATCH v6 10/11] drm/amd: Avoid evicting resources at S5 Mario Limonciello (AMD)
2025-08-18 2:01 ` [PATCH v6 11/11] PM: Use hibernate flows for system power off Mario Limonciello (AMD)
2025-09-03 4:41 ` [PATCH v6 00/11] Improvements to S5 power consumption Mario Limonciello
2025-09-03 11:14 ` Rafael J. Wysocki
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