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From: Jesse.Zhang <Jesse.Zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: <Alexander.Deucher@amd.com>,
	Christian Koenig <christian.koenig@amd.com>,
	 Jesse.Zhang <Jesse.Zhang@amd.com>
Subject: [PATCH 3/3] drm/amdgpu: use irq-safe lock in amdgpu_userq_fence_driver_process
Date: Fri, 24 Oct 2025 17:43:42 +0800	[thread overview]
Message-ID: <20251024094445.3090110-3-Jesse.Zhang@amd.com> (raw)
In-Reply-To: <20251024094445.3090110-1-Jesse.Zhang@amd.com>

The amdgpu_userq_fence_driver_process() function can be called from
both interrupt context (IRQ handlers like gfx_v11_0_eop_irq) and
process context (workqueues like eviction suspend worker). Using
regular spin_lock() in interrupt context triggers lockdep warnings
and could lead to potential deadlocks.

Replace the regular spin_lock()/spin_unlock() with their interrupt-
safe variants spin_lock_irqsave()/spin_unlock_irqrestore() to
ensure proper locking semantics in all execution contexts.

This ensures:
- Interrupts are properly disabled when locking in interrupt context
- No lockdep warnings due to mixed context usage
- Safe execution across all code paths that process user queue fences

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
index 2aeeaa954882..69908b90d255 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
@@ -151,15 +151,16 @@ void amdgpu_userq_fence_driver_process(struct amdgpu_userq_fence_driver *fence_d
 {
 	struct amdgpu_userq_fence *userq_fence, *tmp;
 	struct dma_fence *fence;
+	unsigned long flags;
 	u64 rptr;
 	int i;
 
 	if (!fence_drv)
 		return;
 
+	spin_lock_irqsave(&fence_drv->fence_list_lock, flags);
 	rptr = amdgpu_userq_fence_read(fence_drv);
 
-	spin_lock(&fence_drv->fence_list_lock);
 	list_for_each_entry_safe(userq_fence, tmp, &fence_drv->fences, link) {
 		fence = &userq_fence->base;
 
@@ -174,7 +175,7 @@ void amdgpu_userq_fence_driver_process(struct amdgpu_userq_fence_driver *fence_d
 		list_del(&userq_fence->link);
 		dma_fence_put(fence);
 	}
-	spin_unlock(&fence_drv->fence_list_lock);
+	spin_unlock_irqrestore(&fence_drv->fence_list_lock, flags);
 }
 
 void amdgpu_userq_fence_driver_destroy(struct kref *ref)
-- 
2.49.0


  parent reply	other threads:[~2025-10-24  9:45 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-24  9:43 [PATCH 1/3] drm/amdgpu: Implement user queue reset functionality Jesse.Zhang
2025-10-24  9:43 ` [PATCH 2/3] drm/amdgpu: Add user queue reset mask support Jesse.Zhang
2025-10-29 18:13   ` Alex Deucher
2025-10-30  2:08     ` Zhang, Jesse(Jie)
2025-10-30 12:41       ` Alex Deucher
2025-10-24  9:43 ` Jesse.Zhang [this message]
2025-10-28  4:58   ` [PATCH 3/3] drm/amdgpu: use irq-safe lock in amdgpu_userq_fence_driver_process Zhang, Jesse(Jie)
2025-10-29 18:09   ` Alex Deucher
2025-10-29 18:09 ` [PATCH 1/3] drm/amdgpu: Implement user queue reset functionality Alex Deucher

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