[PATCH 00/14] drm/amdgpu: Support VCE1 IP block

["Timur Kristóf" <timur.kristof@gmail.com>]

VCE1 is the Video Coding Engine 1.0 found in SI GPUs.
Add support for the VCE1 IP block, which is the last
missing piece for fully-featured SI support in amdgpu.
Co-developed by Alexandre Demers and Christian König.

This VCE1 implementation is based on:
VCE2 code in amdgpu
VCE1 code in radeon
Research by Alexandre and Christian

The biggest challenge was getting the firmware
validation mechanism to work correctly. Due to
some limitations in the HW, the VCE1 requires
the VCPU BO to be located at a low 32-bit address.
This was achieved by placing the GART in the
LOW address space and manually mapping the
VCPU BO in the GART page table.

Also hook up the VCE1 to the DPM.

Tested on the following HW:
Radeon R9 280X (Tahiti)
Radeon HD 7990 (Tahiti)
FirePro W9000 (Tahiti)
Radeon R7 450 (Cape Verde)

Looking forward to reviews and feedback!

Timur Kristóf (14):
  drm/amdgpu/gmc: Don't hardcode GART page count before GTT
  drm/amdgpu/gmc6: Place gart at low address range
  drm/amdgpu/gmc6: Add GART space for VCPU BO
  drm/amdgpu/gart: Add helper to bind VRAM BO
  drm/amdgpu/vce: Clear VCPU BO before copying firmware to it
  drm/amdgpu/vce: Move firmware load to amdgpu_vce_early_init
  drm/amdgpu/si,cik,vi: Verify IP block when querying video codecs
  drm/amdgpu/vce1: Clean up register definitions
  drm/amdgpu/vce1: Load VCE1 firmware
  drm/amdgpu/vce1: Implement VCE1 IP block
  drm/amdgpu/vce1: Ensure VCPU BO is in lower 32-bit address space
  drm/amd/pm/si: Hook up VCE1 to SI DPM
  drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUs
  drm/amdgpu/vce1: Tolerate VCE PLL timeout better

 drivers/gpu/drm/amd/amdgpu/Makefile           |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c      |  41 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h      |   2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c       |   2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h       |   1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c   |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c       |   3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c       | 134 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h       |   2 +
 drivers/gpu/drm/amd/amdgpu/cik.c              |   6 +
 drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c         |   7 +-
 drivers/gpu/drm/amd/amdgpu/si.c               |  26 +-
 drivers/gpu/drm/amd/amdgpu/sid.h              |  40 -
 drivers/gpu/drm/amd/amdgpu/vce_v1_0.c         | 857 ++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/vce_v1_0.h         |  32 +
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c         |   5 +
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c         |   5 +
 drivers/gpu/drm/amd/amdgpu/vce_v4_0.c         |   5 +
 drivers/gpu/drm/amd/amdgpu/vi.c               |   6 +
 .../drm/amd/include/asic_reg/vce/vce_1_0_d.h  |   5 +
 .../include/asic_reg/vce/vce_1_0_sh_mask.h    |  10 +
 drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c    |  18 +-
 22 files changed, 1099 insertions(+), 112 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
 create mode 100644 drivers/gpu/drm/amd/amdgpu/vce_v1_0.h

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2.51.0