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Tue, 28 Oct 2025 20:10:38 -0700 From: Ray Wu To: CC: Harry Wentland , Leo Li , Aurabindo Pillai , Roman Li , Wayne Lin , Tom Chung , "Fangzhi Zuo" , Dan Wheeler , Ray Wu , Ivan Lipski , Alex Hung , Austin Zheng , Dillon Varone , Ray Wu Subject: [PATCH 04/13] drm/amd/display: Remove old PMO options Date: Wed, 29 Oct 2025 11:02:52 +0800 Message-ID: <20251029030935.2785560-5-ray.wu@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251029030935.2785560-1-ray.wu@amd.com> References: <20251029030935.2785560-1-ray.wu@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001CD:EE_|CYYPR12MB8751:EE_ X-MS-Office365-Filtering-Correlation-Id: 12bfcada-5b14-48ae-2f53-08de1698ce93 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|30052699003|82310400026|376014|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?ZZ15TYtXtTif5wKfRsipRRIYrkSzFWJnznt+ZXqsugAIthUaxZqkVC7+Yu1I?= =?us-ascii?Q?/jUUOGO7A7CP68HItRgBacDfUdK5eWy8oNfO+CzuF73Uo87tLjrEg1U0cBDK?= =?us-ascii?Q?Ig0u6A0G+bFUfCQQXWJqPnw4XblUJduNJG8VZLsltuhCR0odVX/3ZX6fOm7i?= =?us-ascii?Q?GXzl3uT6durYz/38yocKXKW8xy1zzzxTuhPrE6fLE8OBfVbdk/P5keA7MVVL?= =?us-ascii?Q?hb9tHWMT4xV4e5lRnju7Y6TRWC7HJnGIzTlYa9Y8Sky1gY30gIQdXqgEt7VA?= =?us-ascii?Q?Y7R2BR/QQPEcNUQfgwbrVrxBwwKawIM9O/n1O32kNMWXdV1X6vTQPuA7oqDx?= =?us-ascii?Q?5UYPQAdf9Tr8LWkEpfFVdEWR1Hc5sfEMFJdt5fWR/YEETLrMOW82Yy7YCSSG?= =?us-ascii?Q?qQ7x9pDmUtEzxx3gvs8BPvR9jX3VJIyGrFoyNiAH34uJmUV70gbf4WM60y5/?= =?us-ascii?Q?jyTpL0qNiSbcl7LnIo8lacABjUVUiO1BXnTHYnJmBdhRXddlqY5axnMd3XEr?= =?us-ascii?Q?7IwcIWUnFbzQKTzD2zosVPPWPg2U7a3B4KiyjYdMMDDSkjj5pdjiv6VbvSx0?= =?us-ascii?Q?zegurnwgLl5mjtBNbHEuwpMYu86639yFaFx0gk3PSFnOCW4vL7S5WCa1PYxe?= =?us-ascii?Q?oCF2xY4aeguJgvm/ZtY/Q5e9TDCNQh+Ca0jSpBktRmhFEdmSAxUvXqF0VT4b?= =?us-ascii?Q?AhqmvTEPLv2wnDw9aA4EAq3IVdKOD/EEexFH4bTD5uYUooEqrdymG/YQRmNa?= =?us-ascii?Q?rtkxo2wR+FO4w8ZBbhIjkH8+lZNtoRbZ7ysAiwBLSDV57PYz0OOeCVRoSaV6?= =?us-ascii?Q?2GuLL/a5QzQ5dqQJGYXq7eWoLL864obApnYgUiEtnLzBxUmk6LzZNFzOtPmi?= =?us-ascii?Q?cpevXxDRVqP6/jEckfwAP5q4OYEeaWBDocT7AigcywBZ1tTKFdI69W+lg1uB?= =?us-ascii?Q?kb4queNZulEyzn+xuJvT885OZVyMl5jwT8HDbkrvnVH+ryyWNVr/puAP5iAL?= =?us-ascii?Q?6eMeD6/ixdfDBSYgZtALTGPA/m1gOv2Vp1kQetxuniO46+UREXCCcV4+X2cP?= =?us-ascii?Q?b1shHS8nLBbzzNqJDsfCzv7nOQpo/sq05pLd0Y0Q5vXqLDRahMSaRZmYGmIe?= =?us-ascii?Q?Y+vipTRFWg3mzXu5L02TP17RY1K2yLQs8HzL/tvptkGMBdcLAILGAGtJecnf?= =?us-ascii?Q?7xBMnTuchZ0vi9xSaggL8vjS9dMCMS5joBt+6/qkqzpZpWDbhagBxoOF+S6z?= =?us-ascii?Q?LCLLsBfo6hN0hHWTmPQrKR833mwQWFnMrqy2uT63Ir80nwSAfp3FppTIaxqp?= =?us-ascii?Q?3BeS66wMXD2TmskAmy+T7gKOGqKUa3lSf9sg+uc03cM/wbHZDf1a+H/L47PW?= =?us-ascii?Q?3n/U3tELoiIgmNOGUmrYlchv/yKP56UJOM0/mu+AH6OeMqwwNCTL3p8AnxA4?= =?us-ascii?Q?OGGgDbwCc3pqQL0RVPP+nxa2UgRxwhJtDU8twtgCM+pY0IH2RKzuNowlGCiY?= =?us-ascii?Q?xlsY51AxrYRzqdpbmtk79yUBnURXP5LxMsOREa27+bzqm04pwUs8LcWOCbPw?= =?us-ascii?Q?ag//ZLRihXSwIufiExY=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:satlexmb07.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(30052699003)(82310400026)(376014)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2025 03:11:08.8407 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 12bfcada-5b14-48ae-2f53-08de1698ce93 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CD.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8751 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Austin Zheng [Why & How] Removes deprecated or unused PMO options. Reviewed-by: Dillon Varone Signed-off-by: Austin Zheng Signed-off-by: Ray Wu --- .../display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h | 2 -- .../dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h | 4 ++-- .../dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 6 +----- 3 files changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h index 13749c9fcf18..da8e5c8b2244 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_display_cfg_types.h @@ -423,7 +423,6 @@ struct dml2_stream_parameters { bool disable_dynamic_odm; bool disable_subvp; int minimum_vblank_idle_requirement_us; - bool minimize_active_latency_hiding; struct { struct { @@ -489,7 +488,6 @@ struct dml2_display_cfg { bool synchronize_ddr_displays_for_uclk_pstate_change; bool max_outstanding_when_urgent_expected_disable; bool enable_subvp_implicit_pmo; //enables PMO to switch pipe uclk strategy to subvp, and generate phantom programming - unsigned int best_effort_min_active_latency_hiding_us; bool all_streams_blanked; } overrides; }; diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h index 4a9a0d5a09b7..e87d04a734b5 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_soc_parameter_types.h @@ -89,8 +89,8 @@ struct dml2_soc_qos_parameters { struct dml2_soc_power_management_parameters { double dram_clk_change_blackout_us; - double dram_clk_change_read_only_us; - double dram_clk_change_write_only_us; + double dram_clk_change_read_only_us; // deprecated + double dram_clk_change_write_only_us; // deprecated double fclk_change_blackout_us; double g7_ppt_blackout_us; double g7_temperature_read_blackout_us; diff --git a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c index 5769c2638f9a..abd210401fe2 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c +++ b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c @@ -1962,9 +1962,6 @@ static void reset_display_configuration(struct display_configuation_with_meta *d for (stream_index = 0; stream_index < display_config->display_config.num_streams; stream_index++) { display_config->stage3.stream_svp_meta[stream_index].valid = false; - - display_config->display_config.stream_descriptors[stream_index].overrides.minimize_active_latency_hiding = false; - display_config->display_config.overrides.best_effort_min_active_latency_hiding_us = 0; } for (plane_index = 0; plane_index < display_config->display_config.num_planes; plane_index++) { @@ -1997,7 +1994,6 @@ static void setup_planes_for_drr_by_mask(struct display_configuation_with_meta * plane->overrides.uclk_pstate_change_strategy = dml2_uclk_pstate_change_strategy_force_drr; display_config->stage3.pstate_switch_modes[plane_index] = dml2_pstate_method_fw_drr; - } } } @@ -2063,7 +2059,6 @@ static void setup_planes_for_vblank_by_mask(struct display_configuation_with_met plane->overrides.reserved_vblank_time_ns); display_config->stage3.pstate_switch_modes[plane_index] = dml2_pstate_method_vblank; - } } } @@ -2078,6 +2073,7 @@ static void setup_planes_for_vblank_drr_by_mask(struct display_configuation_with for (plane_index = 0; plane_index < display_config->display_config.num_planes; plane_index++) { if (is_bit_set_in_bitfield(plane_mask, plane_index)) { plane = &display_config->display_config.plane_descriptors[plane_index]; + plane->overrides.reserved_vblank_time_ns = (long)(pmo->soc_bb->power_management_parameters.dram_clk_change_blackout_us * 1000); display_config->stage3.pstate_switch_modes[plane_index] = dml2_pstate_method_fw_vblank_drr; -- 2.43.0