From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Alexandre Demers" <alexandre.f.demers@gmail.com>,
"Timur Kristóf" <timur.kristof@gmail.com>,
"Rodrigo Siqueira" <siqueira@igalia.com>,
"Leo Liu" <Leo.Liu@amd.com>
Subject: [PATCH 02/13] drm/amdgpu/gart: Add helper to bind VRAM pages (v2)
Date: Thu, 6 Nov 2025 19:44:37 +0100 [thread overview]
Message-ID: <20251106184448.8099-3-timur.kristof@gmail.com> (raw)
In-Reply-To: <20251106184448.8099-1-timur.kristof@gmail.com>
Binds pages that located in VRAM to the GART page table.
Useful when a kernel BO is located in VRAM but
needs to be accessed from the GART address space,
for example to give a kernel BO a 32-bit address
when GART is placed in LOW address space.
v2:
- Refactor function to be more reusable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 36 ++++++++++++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 3 ++
2 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 83f3b94ed975..d2237ce9da70 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -367,6 +367,42 @@ void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
drm_dev_exit(idx);
}
+/**
+ * amdgpu_gart_map_vram_range - map VRAM pages into the GART page table
+ *
+ * @adev: amdgpu_device pointer
+ * @pa: physical address of the first page to be mapped
+ * @start_page: first page to map in the GART aperture
+ * @num_pages: number of pages to be mapped
+ * @flags: page table entry flags
+ * @dst: CPU address of the GART table
+ *
+ * Binds a BO that is allocated in VRAM to the GART page table
+ * (all ASICs).
+ *
+ * Useful when a kernel BO is located in VRAM but
+ * needs to be accessed from the GART address space.
+ */
+void amdgpu_gart_map_vram_range(struct amdgpu_device *adev, uint64_t pa,
+ uint64_t start_page, uint64_t num_pages,
+ uint64_t flags, void *dst)
+{
+ u32 i, idx;
+
+ /* The SYSTEM flag indicates the pages aren't in VRAM. */
+ WARN_ON_ONCE(flags & AMDGPU_PTE_SYSTEM);
+
+ if (!drm_dev_enter(adev_to_drm(adev), &idx))
+ return;
+
+ for (i = 0; i < num_pages; ++i) {
+ amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr,
+ start_page + i, pa + AMDGPU_GPU_PAGE_SIZE * i, flags);
+ }
+
+ drm_dev_exit(idx);
+}
+
/**
* amdgpu_gart_bind - bind pages into the gart page table
*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
index 7cc980bf4725..d3118275ddae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
@@ -64,5 +64,8 @@ void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
void *dst);
void amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
int pages, dma_addr_t *dma_addr, uint64_t flags);
+void amdgpu_gart_map_vram_range(struct amdgpu_device *adev, uint64_t pa,
+ uint64_t start_page, uint64_t num_pages,
+ uint64_t flags, void *dst);
void amdgpu_gart_invalidate_tlb(struct amdgpu_device *adev);
#endif
--
2.51.0
next prev parent reply other threads:[~2025-11-06 18:45 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-06 18:44 [PATCH 00/13] drm/amdgpu: Support VCE1 IP block (v3) Timur Kristóf
2025-11-06 18:44 ` [PATCH 01/13] drm/amdgpu/gmc6: Place gart at low address range Timur Kristóf
2025-11-06 18:44 ` Timur Kristóf [this message]
2025-11-06 18:44 ` [PATCH 03/13] drm/amdgpu/ttm: Use GART helper to map VRAM pages (v2) Timur Kristóf
2025-11-06 18:44 ` [PATCH 04/13] drm/amdgpu/vce: Clear VCPU BO before copying firmware to it (v2) Timur Kristóf
2025-11-07 9:25 ` Christian König
2025-11-07 9:39 ` Timur Kristóf
2025-11-06 18:44 ` [PATCH 05/13] drm/amdgpu/vce: Move firmware load to amdgpu_vce_early_init Timur Kristóf
2025-11-06 18:44 ` [PATCH 06/13] drm/amdgpu/vce: Save/restore and pin VCPU BO for all VCE (v2) Timur Kristóf
2025-11-07 9:49 ` Christian König
2025-11-07 9:53 ` Timur Kristóf
2025-11-07 10:01 ` Christian König
2025-11-07 10:47 ` Timur Kristóf
2025-11-07 13:14 ` Christian König
2025-11-07 13:31 ` Timur Kristóf
2025-11-07 13:33 ` Christian König
2025-11-07 13:39 ` Timur Kristóf
2025-11-07 13:45 ` Christian König
2025-11-06 18:44 ` [PATCH 07/13] drm/amdgpu/vce1: Clean up register definitions Timur Kristóf
2025-11-06 18:44 ` [PATCH 08/13] drm/amdgpu/vce1: Load VCE1 firmware Timur Kristóf
2025-11-06 18:44 ` [PATCH 09/13] drm/amdgpu/vce1: Implement VCE1 IP block (v2) Timur Kristóf
2025-11-06 18:44 ` [PATCH 10/13] drm/amdgpu/vce1: Ensure VCPU BO is in lower 32-bit address space (v3) Timur Kristóf
2025-11-07 9:40 ` Christian König
2025-11-06 18:44 ` [PATCH 11/13] drm/amd/pm/si: Hook up VCE1 to SI DPM Timur Kristóf
2025-11-06 18:44 ` [PATCH 12/13] drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUs Timur Kristóf
2025-11-06 18:44 ` [PATCH 13/13] drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000 Timur Kristóf
2025-11-07 9:41 ` Christian König
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