From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Alexandre Demers" <alexandre.f.demers@gmail.com>,
"Timur Kristóf" <timur.kristof@gmail.com>,
"Rodrigo Siqueira" <siqueira@igalia.com>,
"Leo Liu" <Leo.Liu@amd.com>
Subject: [PATCH 07/12] drm/amdgpu/vce1: Load VCE1 firmware
Date: Fri, 7 Nov 2025 16:57:40 +0100 [thread overview]
Message-ID: <20251107155745.8334-8-timur.kristof@gmail.com> (raw)
In-Reply-To: <20251107155745.8334-1-timur.kristof@gmail.com>
Load VCE1 firmware using amdgpu_ucode_request, just like
it is done for other VCE versions.
All SI chips share the same VCE1 firmware file: vce_1_0_0.bin
which will be sent to linux-firmware soon.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Co-developed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 3a986e3589a5..7fead2eebd36 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -41,6 +41,9 @@
#define VCE_IDLE_TIMEOUT msecs_to_jiffies(1000)
/* Firmware Names */
+#ifdef CONFIG_DRM_AMDGPU_SI
+#define FIRMWARE_VCE_V1_0 "amdgpu/vce_1_0_0.bin"
+#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
#define FIRMWARE_BONAIRE "amdgpu/bonaire_vce.bin"
#define FIRMWARE_KABINI "amdgpu/kabini_vce.bin"
@@ -61,6 +64,9 @@
#define FIRMWARE_VEGA12 "amdgpu/vega12_vce.bin"
#define FIRMWARE_VEGA20 "amdgpu/vega20_vce.bin"
+#ifdef CONFIG_DRM_AMDGPU_SI
+MODULE_FIRMWARE(FIRMWARE_VCE_V1_0);
+#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
MODULE_FIRMWARE(FIRMWARE_BONAIRE);
MODULE_FIRMWARE(FIRMWARE_KABINI);
@@ -99,6 +105,12 @@ static int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
static const char *amdgpu_vce_firmware_name(struct amdgpu_device *adev)
{
switch (adev->asic_type) {
+#ifdef CONFIG_DRM_AMDGPU_SI
+ case CHIP_PITCAIRN:
+ case CHIP_TAHITI:
+ case CHIP_VERDE:
+ return FIRMWARE_VCE_V1_0;
+#endif
#ifdef CONFIG_DRM_AMDGPU_CIK
case CHIP_BONAIRE:
return FIRMWARE_BONAIRE;
--
2.51.0
next prev parent reply other threads:[~2025-11-07 15:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-07 15:57 [PATCH 00/12] drm/amdgpu: Support VCE1 IP block (v4) Timur Kristóf
2025-11-07 15:57 ` [PATCH 01/12] drm/amdgpu/gmc6: Place gart at low address range Timur Kristóf
2025-11-07 15:57 ` [PATCH 02/12] drm/amdgpu/gart: Add helper to bind VRAM pages (v2) Timur Kristóf
2025-11-07 15:57 ` [PATCH 03/12] drm/amdgpu/ttm: Use GART helper to map " Timur Kristóf
2025-11-07 15:57 ` [PATCH 04/12] drm/amdgpu/vce: Move firmware load to amdgpu_vce_early_init Timur Kristóf
2025-11-07 15:57 ` [PATCH 05/12] drm/amdgpu/vce: Clear VCPU BO, don't unmap/unreserve (v4) Timur Kristóf
2025-11-10 14:16 ` Christian König
2025-11-07 15:57 ` [PATCH 06/12] drm/amdgpu/vce1: Clean up register definitions Timur Kristóf
2025-11-07 15:57 ` Timur Kristóf [this message]
2025-11-07 15:57 ` [PATCH 08/12] drm/amdgpu/vce1: Implement VCE1 IP block (v2) Timur Kristóf
2025-11-07 15:57 ` [PATCH 09/12] drm/amdgpu/vce1: Ensure VCPU BO is in lower 32-bit address space (v3) Timur Kristóf
2025-11-07 15:57 ` [PATCH 10/12] drm/amd/pm/si: Hook up VCE1 to SI DPM Timur Kristóf
2025-11-07 15:57 ` [PATCH 11/12] drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUs Timur Kristóf
2025-11-07 15:57 ` [PATCH 12/12] drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000 Timur Kristóf
2025-11-10 19:22 ` [PATCH 00/12] drm/amdgpu: Support VCE1 IP block (v4) Christian König
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