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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:satlexmb07.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026)(13003099007); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Nov 2025 19:26:22.7716 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9cf8681e-76e5-46ff-df6c-08de23b3b233 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE1A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7696 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Hi Dave, Simona, Updates for 6.19. The following changes since commit 2a084f4ad727244768b919455aa9dc1c04630487: Merge tag 'amd-drm-next-6.19-2025-11-07' of https://gitlab.freedesktop.org/agd5f/linux into drm-next (2025-11-11 15:35:49 +1000) are available in the Git repository at: https://gitlab.freedesktop.org/agd5f/linux.git tags/amd-drm-next-6.19-2025-11-14 for you to fetch changes up to ccd3b4c7c37fbbd3e5244d3c54ca24ae0a37810d: drm/amdgpu: Use amdgpu by default on SI dedicated GPUs (v2) (2025-11-14 11:28:29 -0500) ---------------------------------------------------------------- amd-drm-next-6.19-2025-11-14: amdgpu: - RAS updates - GC12 DCC P2P fix - Documentation fixes - Power limit code cleanup - Userq updates - VRR fix - SMART OLED support - DSC refactor for DCN 3.5 - Replay updates - DC clockgating updates - HDCP refactor - ISP fix - SMU 13.0.12 updates - JPEG 5.0.1 fix - VCE1 support - Enable DC by default on SI - Refactor CIK and SI enablement - Enable amdgpu by default for CI dGPUs - XGMI fixes - SR-IOV fixes - Memory allocation critical path fixes - Enable amdgpu by default on SI dGPUs amdkfd: - Relax checks on save area overallocations - Fix GPU mappings after prefetch radeon: - Refactor CIK and SI enablement ---------------------------------------------------------------- Ahmad Rehman (1): drm/amdkfd: Fixing the clang format Alvin Lee (1): drm/amd/display: Only initialize LSDMA if it is supported in DMU Asad Kamal (6): drm/amd/pm: Add NULL check for power limit drm/amd/pm: Update pmfw headers for smu_v13_0_12 drm/amd/pm: Add ppt1 support for smu_v13_0_12 drm/amd/pm: Expose ppt1 limit for gc_v9_5_0 drm/amd/pm: Enable ppt1 caps for smu_v13_0_12 drm/amd/pm: Remove power2_average node Christian König (2): drm/amdgpu: avoid memory allocation in the critical code path v3 drm/amdgpu: use GFP_ATOMIC instead of NOWAIT in the critical path Chuntao Tso (1): drm/amd/display: To support Replay frame skip mode Dillon Varone (1): drm/amd/display: Fix index bug for fill latency Dominik Kaszewski (2): drm/amd/display: Change lock descriptor values drm/amd/display: Revert in_transfer_func_change to MED Gangliang Xie (1): drm/amd/pm: remove unnecessary prints for smu busy George Shen (1): drm/amd/display: Add interface to capture power feature status for debug logging Harish Kasiviswanathan (1): drm/amdkfd: Fix GPU mappings for APU after prefetch Ian Chen (1): drm/amd/display: Add new SMART POWER OLED interfaces Ivan Lipski (1): drm/amd/display: Allow VRR params change if unsynced with the stream Jesse.Zhang (2): drm/amdgpu: fix lock warning in amdgpu_userq_fence_driver_process drm/amdgpu: resume MES scheduling after user queue hang detection and recovery Jiapeng Chong (1): drm/amdgpu/userqueue: Remove duplicate amdgpu_reset.h header Jonathan Kim (1): drm/amdkfd: relax checks for over allocation of save area Leo Chen (1): drm/amd/display: dynamically clock gate before and after prefetch Lijo Lazar (2): drm/amdgpu: Check if AID is active before access drm/amdgpu: Avoid xgmi register access Mario Limonciello (AMD) (1): drm/amd: Clarify that amdgpu.audio only works for non-DC Mohit Bawa (1): drm/amd/display: refactor DSC cap calculation for dcn35 Pierre-Eric Pelloux-Prayer (1): drm/amdgpu: jump to the correct label on failure Sathishkumar S (1): drm/amdgpu/jpeg: Add parse_cs for JPEG5_0_1 Srinivasan Shanmugam (2): drm/amd/display: Fix annotations for connector poll/detect parameters drm/amd/display: Add kdoc params/returns in dc/link detection helpers Sultan Alsawaf (1): drm/amd/amdgpu: Ensure isp_kernel_buffer_alloc() creates a new BO Taimur Hassan (2): drm/amd/display: [FW Promotion] Release 0.1.35.0 drm/amd/display: Promote DC to 3.2.358 Tao Zhou (5): drm/amdgpu: load RAS bad page from PMFW in page retirement drm/amdgpu: get RAS bad page address from MCA address drm/amdgpu: try for more times if RAS bad page number is not updated drm/amdgpu: add RAS bad page threshold handling for PMFW manages eeprom drm/amdgpu: optimize timeout implemention in ras_eeprom_update_record_num Timur Kristóf (18): drm/amdgpu/gmc6: Place gart at low address range drm/amdgpu/gart: Add helper to bind VRAM pages (v2) drm/amdgpu: Use DC by default on SI dGPUs drm/amdgpu/ttm: Use GART helper to map VRAM pages (v2) drm/amdgpu/vce: Move firmware load to amdgpu_vce_early_init drm/amdgpu/vce: Clear VCPU BO, don't unmap/unreserve (v4) drm/amdgpu/vce1: Clean up register definitions drm/amdgpu/vce1: Load VCE1 firmware drm/amdgpu/vce1: Implement VCE1 IP block (v2) drm/amdgpu/vce1: Ensure VCPU BO is in lower 32-bit address space (v3) drm/amd/pm/si: Hook up VCE1 to SI DPM drm/amdgpu/vce1: Enable VCE1 on Tahiti, Pitcairn, Cape Verde GPUs drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000 drm/radeon: Refactor how SI and CIK support is determined drm/amdgpu: Refactor how SI and CIK support is determined drm/amdgpu: Use amdgpu by default on CIK dedicated GPUs drm/amdgpu: Use amdgpu by default on CIK dedicated GPUs drm/amdgpu: Use amdgpu by default on SI dedicated GPUs (v2) Vitaly Prosyak (1): drm/amdgpu: disable peer-to-peer access for DCC-enabled GC12 VRAM surfaces Wenjing Liu (2): drm/amd/display: add macros to simplify code drm/amd/display: Refactor HDCP Status Log Format Will Aitken (3): drm/amdgpu: Refactor sriov xgmi topology filling to common code drm/amdgpu: Update headers for sriov xgmi ext peer link support feature flag drm/amdgpu: Enable xgmi extended peer links for sriov guest YiPeng Chai (3): drm/amdgpu: Synchronize sriov host to add block_mmsch bit field drm/amdgpu: Add lock to serialize sriov command execution drm/amdgpu: Fix the issue of missing ras message on sriov host drivers/gpu/drm/amd/amdgpu/Kconfig | 24 +- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 15 - drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 15 +- drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 12 + drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 162 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 36 + drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 3 + drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 58 +- drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c | 2 + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 23 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 23 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 72 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 12 +- drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 147 ++-- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 5 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 174 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 3 + drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 6 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 - drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 4 - drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 37 +- drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 6 +- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +- drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_1.c | 1 + drivers/gpu/drm/amd/amdgpu/mes_userqueue.c | 7 + drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 17 +- drivers/gpu/drm/amd/amdgpu/si.c | 22 +- drivers/gpu/drm/amd/amdgpu/sid.h | 40 - drivers/gpu/drm/amd/amdgpu/vce_v1_0.c | 839 +++++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/vce_v1_0.h | 32 + drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 5 + drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 5 + drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 5 + .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 2 +- drivers/gpu/drm/amd/amdkfd/kfd_queue.c | 12 +- drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 2 + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22 +- .../drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c | 2 +- .../amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 30 + drivers/gpu/drm/amd/display/dc/core/dc.c | 242 ++++-- drivers/gpu/drm/amd/display/dc/dc.h | 28 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 3 + drivers/gpu/drm/amd/display/dc/dc_types.h | 6 + drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c | 7 +- drivers/gpu/drm/amd/display/dc/dce/dmub_replay.h | 5 +- .../dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 2 +- .../gpu/drm/amd/display/dc/dsc/dcn35/dcn35_dsc.c | 31 +- .../drm/amd/display/dc/hubbub/dcn31/dcn31_hubbub.c | 7 +- .../drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.c | 52 +- .../drm/amd/display/dc/hubbub/dcn35/dcn35_hubbub.h | 1 + drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 2 + drivers/gpu/drm/amd/display/dc/inc/link_service.h | 4 +- .../gpu/drm/amd/display/dc/link/link_detection.c | 23 + .../dc/link/protocols/link_edp_panel_control.c | 17 +- .../dc/link/protocols/link_edp_panel_control.h | 4 +- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 10 +- .../drm/amd/display/modules/freesync/freesync.c | 11 + .../gpu/drm/amd/display/modules/hdcp/hdcp_log.c | 124 +-- drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h | 126 ++-- .../drm/amd/display/modules/power/power_helpers.c | 30 + .../drm/amd/display/modules/power/power_helpers.h | 5 + .../gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h | 5 + .../drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h | 10 + drivers/gpu/drm/amd/pm/amdgpu_pm.c | 15 +- drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 18 +- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 5 + .../amd/pm/swsmu/inc/pmfw_if/smu_v13_0_12_pmfw.h | 7 +- .../amd/pm/swsmu/inc/pmfw_if/smu_v13_0_12_ppsmc.h | 4 +- drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 4 +- .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c | 10 + .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 83 +- .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.h | 4 + drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 10 +- drivers/gpu/drm/radeon/radeon_drv.c | 81 +- 79 files changed, 2152 insertions(+), 742 deletions(-) create mode 100644 drivers/gpu/drm/amd/amdgpu/vce_v1_0.c create mode 100644 drivers/gpu/drm/amd/amdgpu/vce_v1_0.h