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Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c | 26 ++++++++----------------- 1 file changed, 8 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c index 8058ea91ecafd..424b05b84ea74 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c @@ -345,12 +345,13 @@ const struct soc15_reg_entry sgpr64_init_regs_aldebaran[] = { static int gfx_v9_4_2_run_shader(struct amdgpu_device *adev, struct amdgpu_ring *ring, - struct amdgpu_ib *ib, const u32 *shader_ptr, u32 shader_size, const struct soc15_reg_entry *init_regs, u32 regs_size, u32 compute_dim_x, u64 wb_gpu_addr, u32 pattern, struct dma_fence **fence_ptr) { + struct amdgpu_job *job; + struct amdgpu_ib *ib; int r, i; uint32_t total_size, shader_offset; u64 gpu_addr; @@ -360,10 +361,9 @@ static int gfx_v9_4_2_run_shader(struct amdgpu_device *adev, shader_offset = total_size; total_size += ALIGN(shader_size, 256); - /* allocate an indirect buffer to put the commands in */ - memset(ib, 0, sizeof(*ib)); - r = amdgpu_ib_get(adev, NULL, total_size, - AMDGPU_IB_POOL_DIRECT, ib); + r = amdgpu_job_alloc_with_ib(ring->adev, NULL, NULL, total_size, + AMDGPU_IB_POOL_DIRECT, &job, + AMDGPU_KERNEL_JOB_ID_RUN_SHADER); if (r) { dev_err(adev->dev, "failed to get ib (%d).\n", r); return r; @@ -408,11 +408,11 @@ static int gfx_v9_4_2_run_shader(struct amdgpu_device *adev, ib->ptr[ib->length_dw++] = REG_SET_FIELD(0, COMPUTE_DISPATCH_INITIATOR, COMPUTE_SHADER_EN, 1); - /* shedule the ib on the ring */ - r = amdgpu_ib_schedule(ring, 1, ib, NULL, fence_ptr); + /* schedule the ib on the ring */ + r = amdgpu_job_submit_direct(job, ring, fence_ptr); if (r) { dev_err(adev->dev, "ib submit failed (%d).\n", r); - amdgpu_ib_free(ib, NULL); + amdgpu_job_free(job); } return r; } @@ -493,7 +493,6 @@ static int gfx_v9_4_2_do_sgprs_init(struct amdgpu_device *adev) int wb_size = adev->gfx.config.max_shader_engines * CU_ID_MAX * SIMD_ID_MAX * WAVE_ID_MAX; struct amdgpu_ib wb_ib; - struct amdgpu_ib disp_ibs[3]; struct dma_fence *fences[3]; u32 pattern[3] = { 0x1, 0x5, 0xa }; @@ -514,7 +513,6 @@ static int gfx_v9_4_2_do_sgprs_init(struct amdgpu_device *adev) r = gfx_v9_4_2_run_shader(adev, &adev->gfx.compute_ring[0], - &disp_ibs[0], sgpr112_init_compute_shader_aldebaran, sizeof(sgpr112_init_compute_shader_aldebaran), sgpr112_init_regs_aldebaran, @@ -539,7 +537,6 @@ static int gfx_v9_4_2_do_sgprs_init(struct amdgpu_device *adev) r = gfx_v9_4_2_run_shader(adev, &adev->gfx.compute_ring[1], - &disp_ibs[1], sgpr96_init_compute_shader_aldebaran, sizeof(sgpr96_init_compute_shader_aldebaran), sgpr96_init_regs_aldebaran, @@ -579,7 +576,6 @@ static int gfx_v9_4_2_do_sgprs_init(struct amdgpu_device *adev) memset(wb_ib.ptr, 0, (1 + wb_size) * sizeof(uint32_t)); r = gfx_v9_4_2_run_shader(adev, &adev->gfx.compute_ring[0], - &disp_ibs[2], sgpr64_init_compute_shader_aldebaran, sizeof(sgpr64_init_compute_shader_aldebaran), sgpr64_init_regs_aldebaran, @@ -611,13 +607,10 @@ static int gfx_v9_4_2_do_sgprs_init(struct amdgpu_device *adev) } disp2_failed: - amdgpu_ib_free(&disp_ibs[2], NULL); dma_fence_put(fences[2]); disp1_failed: - amdgpu_ib_free(&disp_ibs[1], NULL); dma_fence_put(fences[1]); disp0_failed: - amdgpu_ib_free(&disp_ibs[0], NULL); dma_fence_put(fences[0]); pro_end: amdgpu_ib_free(&wb_ib, NULL); @@ -637,7 +630,6 @@ static int gfx_v9_4_2_do_vgprs_init(struct amdgpu_device *adev) int wb_size = adev->gfx.config.max_shader_engines * CU_ID_MAX * SIMD_ID_MAX * WAVE_ID_MAX; struct amdgpu_ib wb_ib; - struct amdgpu_ib disp_ib; struct dma_fence *fence; u32 pattern = 0xa; @@ -657,7 +649,6 @@ static int gfx_v9_4_2_do_vgprs_init(struct amdgpu_device *adev) r = gfx_v9_4_2_run_shader(adev, &adev->gfx.compute_ring[0], - &disp_ib, vgpr_init_compute_shader_aldebaran, sizeof(vgpr_init_compute_shader_aldebaran), vgpr_init_regs_aldebaran, @@ -687,7 +678,6 @@ static int gfx_v9_4_2_do_vgprs_init(struct amdgpu_device *adev) } disp_failed: - amdgpu_ib_free(&disp_ib, NULL); dma_fence_put(fence); pro_end: amdgpu_ib_free(&wb_ib, NULL); -- 2.52.0