From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ABEA5C44536 for ; Wed, 21 Jan 2026 23:38:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8EEBA10E8A6; Wed, 21 Jan 2026 23:38:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="BeikHttw"; dkim-atps=neutral Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1C1DD10E0F4; Wed, 21 Jan 2026 23:38:06 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id A474041697; Wed, 21 Jan 2026 23:38:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 54A20C4CEF1; Wed, 21 Jan 2026 23:38:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1769038685; bh=weaJN1Iequ/ZyzA1DPueH31401FC5DUZbpwwcPNyzmQ=; h=Date:From:To:Cc:Subject:In-Reply-To:From; b=BeikHttwrCy8vR2Z2txVC+OK5mggBSlKkHUlak+4qJNsLFrRy2lVin2znkr8uhTQV hDrmRILtEmj7vUJozkGZqTtkC7jUFLFbW93vmaGTVqr/Sn5lqEpjj1cfK583XK2h1W cWE3lMXXh6kONxTUrzilJiZU5A5Y89Zu2yn7RIUyGceGoUtYvSK8Y5rNZvlAy9u9iN R2s2BfJMHAxgIvFEovn2WRV21tJsbeLz8tsu8o8CSDoBDHmaPSHQj2jCW8PFkiE8aJ ocO0pWswC8u3eMGvxOnwCJab2Y+7vdjDnkfCiO1CZLrXf1aJX6D22EoP5AUFp1+EdI qGoPNveHv3RcA== Date: Wed, 21 Jan 2026 17:38:04 -0600 From: Bjorn Helgaas To: Vivian Wang Cc: Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Alex Deucher , Christian =?utf-8?B?S8O2bmln?= , David Airlie , Simona Vetter , "Creeley, Brett" , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , Jaroslav Kysela , Takashi Iwai , Han Gao , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-sound@vger.kernel.org, linux-riscv@lists.infradead.org, sophgo@lists.linux.dev, Thomas Gleixner Subject: Re: [PATCH v2 2/4] PCI/MSI: Check msi_addr_mask in msi_verify_entries() Message-ID: <20260121233804.GA1221537@bhelgaas> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260121-pci-msi-addr-mask-v2-2-f42593168989@iscas.ac.cn> X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" [+cc Thomas, thread at https://lore.kernel.org/r/20260121-pci-msi-addr-mask-v2-0-f42593168989@iscas.ac.cn] On Wed, Jan 21, 2026 at 11:49:38AM +0800, Vivian Wang wrote: > Instead of a 32-bit/64-bit dichotomy, check the MSI address against > msi_addr_mask. > > This allows platforms with MSI doorbell above 32-bit address space to > work with devices without full 64-bit MSI address support, as long as > the doorbell is within addressable range of MSI of the device. > > Signed-off-by: Vivian Wang > > --- > v2: No changes > --- > drivers/pci/msi/msi.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/msi/msi.c b/drivers/pci/msi/msi.c > index 48f5f03d1479..2ecbcd6c436a 100644 > --- a/drivers/pci/msi/msi.c > +++ b/drivers/pci/msi/msi.c > @@ -321,14 +321,17 @@ static int msi_setup_msi_desc(struct pci_dev *dev, int nvec, > static int msi_verify_entries(struct pci_dev *dev) > { > struct msi_desc *entry; > + u64 address; > > if (dev->msi_addr_mask == DMA_BIT_MASK(64)) > return 0; > > msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) { > - if (entry->msg.address_hi) { > - pci_err(dev, "arch assigned 64-bit MSI address %#x%08x but device only supports 32 bits\n", > - entry->msg.address_hi, entry->msg.address_lo); > + address = (u64)entry->msg.address_hi << 32 | > + entry->msg.address_lo; > + if (address & ~dev->msi_addr_mask) { > + pci_err(dev, "arch assigned 64-bit MSI address %llx above device MSI address mask %llx\n", Use %#llx so it's clear these addresses are hex. The previous message did that, not sure why you dropped it. > + address, dev->msi_addr_mask); > break; > } > } > > -- > 2.52.0 >