From: kernel test robot <lkp@intel.com>
To: "Pierre-Eric Pelloux-Prayer" <pierre-eric.pelloux-prayer@amd.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>
Cc: oe-kbuild-all@lists.linux.dev,
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>,
amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 04/11] amdgpu/vce: use amdgpu_gtt_mgr_alloc_entries
Date: Wed, 28 Jan 2026 21:21:15 +0800 [thread overview]
Message-ID: <202601282153.4kuaeoS5-lkp@intel.com> (raw)
In-Reply-To: <20260126133518.2486-5-pierre-eric.pelloux-prayer@amd.com>
Hi Pierre-Eric,
kernel test robot noticed the following build warnings:
[auto build test WARNING on next-20260123]
[cannot apply to drm-misc/drm-misc-next v6.19-rc7 v6.19-rc6 v6.19-rc5 linus/master v6.19-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Pierre-Eric-Pelloux-Prayer/drm-amdgpu-remove-gart_window_lock-usage-from-gmc-v12_1/20260126-214013
base: next-20260123
patch link: https://lore.kernel.org/r/20260126133518.2486-5-pierre-eric.pelloux-prayer%40amd.com
patch subject: [PATCH v6 04/11] amdgpu/vce: use amdgpu_gtt_mgr_alloc_entries
config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20260128/202601282153.4kuaeoS5-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 15.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260128/202601282153.4kuaeoS5-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202601282153.4kuaeoS5-lkp@intel.com/
All warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/vce_v1_0.c: In function 'vce_v1_0_ensure_vcpu_bo_32bit_addr':
>> drivers/gpu/drm/amd/amdgpu/vce_v1_0.c:533:13: warning: unused variable 'gpu_addr' [-Wunused-variable]
533 | u64 gpu_addr = amdgpu_bo_gpu_offset(adev->vce.vcpu_bo);
| ^~~~~~~~
vim +/gpu_addr +533 drivers/gpu/drm/amd/amdgpu/vce_v1_0.c
d4a640d4b9f34a Timur Kristóf 2025-11-07 516
221cadb9c6bc2e Timur Kristóf 2025-11-07 517 /**
221cadb9c6bc2e Timur Kristóf 2025-11-07 518 * vce_v1_0_ensure_vcpu_bo_32bit_addr() - ensure the VCPU BO has a 32-bit address
221cadb9c6bc2e Timur Kristóf 2025-11-07 519 *
221cadb9c6bc2e Timur Kristóf 2025-11-07 520 * @adev: amdgpu_device pointer
221cadb9c6bc2e Timur Kristóf 2025-11-07 521 *
221cadb9c6bc2e Timur Kristóf 2025-11-07 522 * Due to various hardware limitations, the VCE1 requires
221cadb9c6bc2e Timur Kristóf 2025-11-07 523 * the VCPU BO to be in the low 32 bit address range.
221cadb9c6bc2e Timur Kristóf 2025-11-07 524 * Ensure that the VCPU BO has a 32-bit GPU address,
221cadb9c6bc2e Timur Kristóf 2025-11-07 525 * or return an error code when that isn't possible.
221cadb9c6bc2e Timur Kristóf 2025-11-07 526 *
221cadb9c6bc2e Timur Kristóf 2025-11-07 527 * To accomodate that, we put GART to the LOW address range
221cadb9c6bc2e Timur Kristóf 2025-11-07 528 * and reserve some GART pages where we map the VCPU BO,
221cadb9c6bc2e Timur Kristóf 2025-11-07 529 * so that it gets a 32-bit address.
221cadb9c6bc2e Timur Kristóf 2025-11-07 530 */
221cadb9c6bc2e Timur Kristóf 2025-11-07 531 static int vce_v1_0_ensure_vcpu_bo_32bit_addr(struct amdgpu_device *adev)
221cadb9c6bc2e Timur Kristóf 2025-11-07 532 {
221cadb9c6bc2e Timur Kristóf 2025-11-07 @533 u64 gpu_addr = amdgpu_bo_gpu_offset(adev->vce.vcpu_bo);
221cadb9c6bc2e Timur Kristóf 2025-11-07 534 u64 bo_size = amdgpu_bo_size(adev->vce.vcpu_bo);
221cadb9c6bc2e Timur Kristóf 2025-11-07 535 u64 max_vcpu_bo_addr = 0xffffffff - bo_size;
221cadb9c6bc2e Timur Kristóf 2025-11-07 536 u64 num_pages = ALIGN(bo_size, AMDGPU_GPU_PAGE_SIZE) / AMDGPU_GPU_PAGE_SIZE;
221cadb9c6bc2e Timur Kristóf 2025-11-07 537 u64 pa = amdgpu_gmc_vram_pa(adev, adev->vce.vcpu_bo);
221cadb9c6bc2e Timur Kristóf 2025-11-07 538 u64 flags = AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE | AMDGPU_PTE_VALID;
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 539 u64 vce_gart_start;
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 540 int r;
221cadb9c6bc2e Timur Kristóf 2025-11-07 541
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 542 r = amdgpu_gtt_mgr_alloc_entries(&adev->mman.gtt_mgr,
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 543 &adev->vce.node, num_pages,
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 544 DRM_MM_INSERT_LOW);
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 545 if (r)
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 546 return r;
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 547
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 548 vce_gart_start = adev->vce.node.start * AMDGPU_GPU_PAGE_SIZE;
221cadb9c6bc2e Timur Kristóf 2025-11-07 549
221cadb9c6bc2e Timur Kristóf 2025-11-07 550 /* Check if we can map the VCPU BO in GART to a 32-bit address. */
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 551 if (adev->gmc.gart_start + vce_gart_start > max_vcpu_bo_addr)
221cadb9c6bc2e Timur Kristóf 2025-11-07 552 return -EINVAL;
221cadb9c6bc2e Timur Kristóf 2025-11-07 553
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 554 amdgpu_gart_map_vram_range(adev, pa, adev->vce.node.start,
221cadb9c6bc2e Timur Kristóf 2025-11-07 555 num_pages, flags, adev->gart.ptr);
6e8defc22cdff6 Pierre-Eric Pelloux-Prayer 2026-01-26 556 adev->vce.gpu_addr = adev->gmc.gart_start + vce_gart_start;
221cadb9c6bc2e Timur Kristóf 2025-11-07 557 if (adev->vce.gpu_addr > max_vcpu_bo_addr)
221cadb9c6bc2e Timur Kristóf 2025-11-07 558 return -EINVAL;
221cadb9c6bc2e Timur Kristóf 2025-11-07 559
221cadb9c6bc2e Timur Kristóf 2025-11-07 560 return 0;
221cadb9c6bc2e Timur Kristóf 2025-11-07 561 }
221cadb9c6bc2e Timur Kristóf 2025-11-07 562
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
next prev parent reply other threads:[~2026-01-28 13:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-26 13:34 [PATCH v6 00/11] drm/amdgpu: preparation patchs for the use all SDMA instances series Pierre-Eric Pelloux-Prayer
2026-01-26 13:34 ` [PATCH v6 01/11] drm/amdgpu: remove gart_window_lock usage from gmc v12_1 Pierre-Eric Pelloux-Prayer
2026-01-26 13:34 ` [PATCH v6 02/11] drm/amdgpu: statically assign gart windows to ttm entities Pierre-Eric Pelloux-Prayer
2026-01-26 13:34 ` [PATCH v6 03/11] drm/amdgpu: add amdgpu_ttm_buffer_entity_fini func Pierre-Eric Pelloux-Prayer
2026-01-26 13:34 ` [PATCH v6 04/11] amdgpu/vce: use amdgpu_gtt_mgr_alloc_entries Pierre-Eric Pelloux-Prayer
2026-01-26 19:09 ` Christian König
2026-01-28 13:21 ` kernel test robot [this message]
2026-01-26 13:35 ` [PATCH v6 05/11] amdgpu/ttm: " Pierre-Eric Pelloux-Prayer
2026-01-27 10:09 ` Christian König
2026-01-26 13:35 ` [PATCH v6 06/11] amdgpu/gtt: remove AMDGPU_GTT_NUM_TRANSFER_WINDOWS Pierre-Eric Pelloux-Prayer
2026-01-27 10:18 ` Christian König
2026-01-27 10:22 ` Christian König
2026-01-26 13:35 ` [PATCH v6 07/11] drm/amdgpu: add missing lock in amdgpu_benchmark_do_move Pierre-Eric Pelloux-Prayer
2026-01-26 13:35 ` [PATCH v6 08/11] drm/amdgpu: check entity lock is held in amdgpu_ttm_job_submit Pierre-Eric Pelloux-Prayer
2026-01-26 13:35 ` [PATCH v6 09/11] drm/amdgpu: double AMDGPU_GTT_MAX_TRANSFER_SIZE Pierre-Eric Pelloux-Prayer
2026-01-26 13:35 ` [PATCH v6 10/11] drm/amdgpu: introduce amdgpu_sdma_set_vm_pte_scheds Pierre-Eric Pelloux-Prayer
2026-01-26 13:35 ` [PATCH v6 11/11] drm/amdgpu: move sched status check inside amdgpu_ttm_set_buffer_funcs_status Pierre-Eric Pelloux-Prayer
2026-01-27 10:23 ` Christian König
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