[PATCH 07/14] amdgpu/umsch: Add VCN IP init to umsch driver

["David (Ming Qiang) Wu" <David.Wu3@amd.com>]

Add VCN IP init in the umsch init sequence.

v4 - set the vmid_mask_mm_vcn to be 0xff00
     keep bit 0-7 for kernel queue VPE and JPEG
v3 - use vcn.disable_kq rather than gfx.disable_kq
v2 - configure the mqd and hqd mask based on
     usermode and kernel queue enable (Alex)

Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
index cd707d70a0bf..760285ad028f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c
@@ -272,6 +272,17 @@ static int umsch_mm_init(struct amdgpu_device *adev)
 	adev->umsch_mm.engine_mask = (1 << UMSCH_SWIP_ENGINE_TYPE_VPE);
 	adev->umsch_mm.vpe_hqd_mask = 0xfe;
 
+	/* reserve bit 0-7 for kernel queue VPE and JPEG */
+	adev->umsch_mm.vmid_mask_mm_vcn = 0xff00;
+	adev->umsch_mm.engine_mask |= (1 << UMSCH_SWIP_ENGINE_TYPE_VCN);
+	/*
+	 *  HQD mask values for VCN
+	 *  0xf - Use all the VCN HW Queues
+	 *  0xe - HWQ 1 is used for kernel submission
+	 *		0xe is just leaving the Q 1 and using the rest of Queues
+	 */
+	adev->umsch_mm.vcn_hqd_mask[0] = adev->vcn.disable_kq ? 0xf : 0xe;
+	adev->umsch_mm.vcn_hqd_mask[1] = adev->vcn.disable_kq ? 0xf : 0xe;
 	r = amdgpu_device_wb_get(adev, &adev->umsch_mm.wb_index);
 	if (r) {
 		dev_err(adev->dev, "failed to alloc wb for umsch: %d\n", r);
-- 
2.43.0