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From: James Zhu <James.Zhu@amd.com>
To: <amd-gfx@lists.freedesktop.org>, <alexander.deucher@amd.com>,
	<Bing.Ma@amd.com>, <benjamin.welton@amd.com>
Cc: <Jesse.Zhang@amd.com>, <Jenny-Jing.Liu@amd.com>, <jamesz@amd.com>
Subject: [RFC PATCH 4/5] drm/amdgpu/gfx12: add compute performance count control
Date: Wed, 4 Mar 2026 17:28:28 -0500	[thread overview]
Message-ID: <20260304222829.3688601-5-James.Zhu@amd.com> (raw)
In-Reply-To: <20260304222829.3688601-1-James.Zhu@amd.com>

through amdgpu IOCTL AMDGPU_USERQ/AMDGPU_USERQ_OP_MODIFY.

Signed-off-by: James Zhu <James.Zhu@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index b9c43738bd86..410fbeea4111 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -3293,6 +3293,9 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
 		mqd->cp_hqd_wg_state_offset = prop->ctl_stack_size;
 	}
 
+	mqd->compute_perfcount_enable =
+		(prop->cu_flags == AMDGPU_UPDATE_FLAG_PERFCOUNT_ENABLE) ? 1 : 0;
+
 	return 0;
 }
 
-- 
2.34.1


  parent reply	other threads:[~2026-03-04 22:28 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-04 22:28 [RFC PATCH 0/5] add compute performance count control James Zhu
2026-03-04 22:28 ` [RFC PATCH 1/5] drm/amdgpu: add MQD update on cu_flags James Zhu
2026-03-04 22:28 ` [RFC PATCH 2/5] drm/amdgpu/gfx10: add compute performance count control James Zhu
2026-03-04 22:28 ` [RFC PATCH 3/5] drm/amdgpu/gfx11: " James Zhu
2026-03-04 22:28 ` James Zhu [this message]
2026-03-04 22:28 ` [RFC PATCH 5/5] drm/amdgpu/gfx12.1: " James Zhu
2026-03-09 18:34 ` [RFC PATCH 0/5] " James Zhu

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