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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: VQLykUJnLxCLZmhQ7+h7JHZAqGuahqqkmgX3dT6FE+tddn1+Ym1Am10FEkw/ggyO5HQWtO2Ak/C6FeU0a2Jq6l1ouNMaHEMIT6zehk5KQT6nkLMhWUeqkpViGUibM0D2usLk9jiAa8jRfPyPAPmOlKl2pelZtFO9K4iUx1dTvrGh85mp/AtjSxttBwdzXzudQ/QAbvgYq9f5TkbjCokk6fjH5JIgRyfU1uu0UaHjwgmErO0BJzQQAl4mchlAmCLwih8Ms45zhhmXFe96SroTPUgR4nhGG/JeaAWX3yAjtrMQkT6qoYXSu8ofjpMyyWIQbZ3a/W6Co1X/HSE7ls32as5XgLX4e5r2rDEVJwPZp46ZvrCGKZsa4KcV5qwQH1opS+h7lvWIeClIolCgMVov7QcnSQmmycztMmqk/clgvkvBYH5roK0rj8ORe+W9/Ag0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Mar 2026 20:13:13.9181 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d5f1f745-0448-41bc-7fbf-08de84619e91 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3F.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4235 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Asad Kamal add populate_umd_state_clk support for smu 15.0.8 v2: remove gl2clk/socclk/fclk, restrict to only current min/max (Lijo) Signed-off-by: Asad Kamal Signed-off-by: Yang Wang Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher --- .../drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c index 9b48c258b1f20..f3378e73b6ccb 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c @@ -1376,6 +1376,21 @@ static int smu_v15_0_8_get_power_limit(struct smu_context *smu, return 0; } +static int smu_v15_0_8_populate_umd_state_clk(struct smu_context *smu) +{ + struct smu_15_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context; + struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; + struct smu_dpm_table *mem_table = &dpm_context->dpm_tables.uclk_table; + struct smu_umd_pstate_table *pstate_table = &smu->pstate_table; + + pstate_table->gfxclk_pstate.curr.min = SMU_DPM_TABLE_MIN(gfx_table); + pstate_table->gfxclk_pstate.curr.max = SMU_DPM_TABLE_MAX(gfx_table); + + pstate_table->uclk_pstate.curr.min = SMU_DPM_TABLE_MIN(mem_table); + pstate_table->uclk_pstate.curr.max = SMU_DPM_TABLE_MAX(mem_table); + return 0; +} + static const struct pptable_funcs smu_v15_0_8_ppt_funcs = { .init_allowed_features = smu_v15_0_8_init_allowed_features, .set_default_dpm_table = smu_v15_0_8_set_default_dpm_table, @@ -1404,7 +1419,8 @@ static const struct pptable_funcs smu_v15_0_8_ppt_funcs = { .get_power_limit = smu_v15_0_8_get_power_limit, .set_power_limit = smu_v15_0_set_power_limit, .emit_clk_levels = smu_v15_0_8_emit_clk_levels, -}; + .populate_umd_state_clk = smu_v15_0_8_populate_umd_state_clk, + }; static void smu_v15_0_8_init_msg_ctl(struct smu_context *smu, const struct cmn2asic_msg_mapping *message_map) -- 2.53.0