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Wed, 18 Mar 2026 09:08:56 -0500 From: Alex Deucher To: CC: Alex Deucher Subject: [PATCH 02/16] drm/amdgpu/gfx8: align mqd settings with KFD Date: Wed, 18 Mar 2026 10:08:23 -0400 Message-ID: <20260318140837.582776-2-alexander.deucher@amd.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260318140837.582776-1-alexander.deucher@amd.com> References: <20260318140837.582776-1-alexander.deucher@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E66:EE_|DM4PR12MB6493:EE_ X-MS-Office365-Filtering-Correlation-Id: 08993e6b-95ae-4d5c-3731-08de84f7e59e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|82310400026|376014|36860700016|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: HZmtNNo8Ya/GooWNhxz/iKc3aFYIPZGrYf7o45PES+S+HJiC2bbdz1q1sK+/xFq8zkibzCUuotDHCRbZcqKLTHYyCPEmp5Iq9YBMHmabFBdIXN5rdp7GMYlJrHwQzyBVmfYcseIV38T3gFr36oArzH993RyTlKnV5J3OY30XdEK3FR7Ggsj0uomfI1pyR1nrpusZUmHygz/+5zjm+H3jmoZNregev1Ld94kWtYxXaY2cKnHHVrS6OkyNzMZH4fRhqgq9swW7iJQdTbrloFKIFU8U2DgVB2Jk2tNa7fnrRRotCOmzTPBMpb00787LTs1xFW6Cgq4RmrNnetHsvToywznJ+whNDOS1+1LY+CIsnfCVItswDwXRBs0oCeQ03ODQ2K9UPmzee2fXhzX06fCNd72ot1SJ5XZgb90x+fOw46epulNP9GdTF9ablu03djzYp7U2+YHFWH9E4C/4rbN7b88uiyPtMPNZ5qqKi7fVn185zQa1aHrMp1rqVBhgox6obA4NqNwCRcvlteOIhb1ZTaUTorHkX2nOYZCR7FEoywo+yl9eamQKwSfmJjmaBuaFa8BpdObvPUcyfA2oljl+jfaLF8YtPWdxGloJB6+18yDxkx7CGfskMPYdhEh2cCrhjzAm8d8oK4GywmRjG9R7SJZ2exhCO71aqDxAMGGvxtHqNt3UxFO2ybh1DkkavWtK6J6bSBkm2LrLMfrVApPY584H1paOCQFnG7EwkzTS/eVjcL7M99W41ndlb9q4uSVug5DqOQIZ6K5nBL7krLEUxQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Ip=[165.204.84.17]; Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E66.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6493 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Make sure to set the quantum bits in the compute MQD for better fairness across queues of the same priority. Reviewed-by：Jesse Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index a6b4c8f41dc11..130196859ff3f 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -4532,7 +4532,11 @@ static int gfx_v8_0_mqd_init(struct amdgpu_ring *ring) /* set static priority for a queue/ring */ gfx_v8_0_mqd_set_priority(ring, mqd); - mqd->cp_hqd_quantum = RREG32(mmCP_HQD_QUANTUM); + tmp = RREG32(mmCP_HQD_QUANTUM); + tmp = REG_SET_FIELD(tmp, CP_HQD_QUANTUM, QUANTUM_EN, 1); + tmp = REG_SET_FIELD(tmp, CP_HQD_QUANTUM, QUANTUM_SCALE, 1); + tmp = REG_SET_FIELD(tmp, CP_HQD_QUANTUM, QUANTUM_DURATION, 10); + mqd->cp_hqd_quantum = tmp; /* map_queues packet doesn't need activate the queue, * so only kiq need set this field. -- 2.53.0