From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0F3EE9DE68 for ; Thu, 9 Apr 2026 08:45:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7FB7510E7A3; Thu, 9 Apr 2026 08:45:40 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="aIBLs8OE"; dkim-atps=neutral Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by gabe.freedesktop.org (Postfix) with ESMTPS id C64F210E650; Wed, 8 Apr 2026 13:07:55 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id E2C566012A; Wed, 8 Apr 2026 13:07:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4B268C2BCAF; Wed, 8 Apr 2026 13:07:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1775653674; bh=/iBGnUC2AH0z0vNZBn4GhsYbz8y4/QV+MxnEKfnRhGo=; h=Subject:To:Cc:From:Date:In-Reply-To:From; b=aIBLs8OEluYt7FnLnQm6/p8uiq/7WZ4Bt4TOERlhzCdqRlaJc0RtLItlZU5X2mZtP 7Uf5GoOUYElSbLFKF7odI7ne2y+Dn4WQjegyGmc1w3Sdhm3RZRs3WaByZG7NBhpaTP jtSvDt3NhkV+x598gTKyThvAv1EcdJBVYA+X4q08= Subject: Patch "drm/amd/display: Adjust DCE 8-10 clock, don't overclock by 15%" has been added to the 6.12-stable tree To: Eric.Yang2@amd.com, Mario.Limonciello@amd.com, Rodrigo.Siqueira@amd.com, Roman.Li@amd.com, Tony.Cheng@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, alex.hung@amd.com, alexander.deucher@amd.com, amd-gfx@lists.freedesktop.org, christian.koenig@amd.com, dri-devel@lists.freedesktop.org, gregkh@linuxfoundation.org, harry.wentland@amd.com, issor.oruam@gmail.com, ray.wu@amd.com, rosenp@gmail.com, simona@ffwll.ch, siqueira@igalia.com, sunpeng.li@amd.com, timur.kristof@gmail.com, wayne.lin@amd.com Cc: From: Date: Wed, 08 Apr 2026 15:07:39 +0200 In-Reply-To: <20260401003908.3438-8-rosenp@gmail.com> Message-ID: <2026040839-postal-campsite-d523@gregkh> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-stable: commit X-Patchwork-Hint: ignore X-Mailman-Approved-At: Thu, 09 Apr 2026 08:45:39 +0000 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" This is a note to let you know that I've just added the patch titled drm/amd/display: Adjust DCE 8-10 clock, don't overclock by 15% to the 6.12-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: drm-amd-display-adjust-dce-8-10-clock-don-t-overclock-by-15.patch and it can be found in the queue-6.12 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >From stable+bounces-232627-greg=kroah.com@vger.kernel.org Wed Apr 1 02:45:17 2026 From: Rosen Penev Date: Tue, 31 Mar 2026 17:39:05 -0700 Subject: drm/amd/display: Adjust DCE 8-10 clock, don't overclock by 15% To: stable@vger.kernel.org Cc: "Alex Deucher" , "Christian König" , "Xinhui Pan" , "David Airlie" , "Simona Vetter" , "Harry Wentland" , "Leo Li" , "Rodrigo Siqueira" , "Ray Wu" , "Wayne Lin" , "Mario Limonciello" , "Roman Li" , "Eric Yang" , "Tony Cheng" , "Mauro Rossi" , "Timur Kristóf" , "Alex Hung" , amd-gfx@lists.freedesktop.org (open list:RADEON and AMDGPU DRM DRIVERS), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS), linux-kernel@vger.kernel.org (open list) Message-ID: <20260401003908.3438-8-rosenp@gmail.com> From: Timur Kristóf [ Upstream commit 1ae45b5d4f371af8ae51a3827d0ec9fe27eeb867 ] Adjust the nominal (and performance) clocks for DCE 8-10, and set them to 625 MHz, which is the value used by the legacy display code in amdgpu_atombios_get_clock_info. This was tested with Hawaii, Tonga and Fiji. These GPUs can output 4K 60Hz (10-bit depth) at 625 MHz. The extra 15% clock was added as a workaround for a Polaris issue which uses DCE 11, and should not have been used on DCE 8-10 which are already hardcoded to the highest possible display clock. Unfortunately, the extra 15% was mistakenly copied and kept even on code paths which don't affect Polaris. This commit fixes that and also adds a check to make sure not to exceed the maximum DCE 8-10 display clock. Fixes: 8cd61c313d8b ("drm/amd/display: Raise dispclk value for Polaris") Fixes: dc88b4a684d2 ("drm/amd/display: make clk mgr soc specific") Signed-off-by: Timur Kristóf Acked-by: Alex Deucher Reviewed-by: Rodrigo Siqueira Reviewed-by: Alex Hung Signed-off-by: Alex Deucher Signed-off-by: Rosen Penev Signed-off-by: Greg Kroah-Hartman --- drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c @@ -72,9 +72,9 @@ static const struct state_dependent_cloc /* ClocksStateLow */ { .display_clk_khz = 352000, .pixel_clk_khz = 330000}, /* ClocksStateNominal */ -{ .display_clk_khz = 600000, .pixel_clk_khz = 400000 }, +{ .display_clk_khz = 625000, .pixel_clk_khz = 400000 }, /* ClocksStatePerformance */ -{ .display_clk_khz = 600000, .pixel_clk_khz = 400000 } }; +{ .display_clk_khz = 625000, .pixel_clk_khz = 400000 } }; int dentist_get_divider_from_did(int did) { @@ -403,11 +403,9 @@ static void dce_update_clocks(struct clk { struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); struct dm_pp_power_level_change_request level_change_req; - int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; - - /*TODO: W/A for dal3 linux, investigate why this works */ - if (!clk_mgr_dce->dfs_bypass_active) - patched_disp_clk = patched_disp_clk * 115 / 100; + const int max_disp_clk = + clk_mgr_dce->max_clks_by_state[DM_PP_CLOCKS_STATE_PERFORMANCE].display_clk_khz; + int patched_disp_clk = MIN(max_disp_clk, context->bw_ctx.bw.dce.dispclk_khz); level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); /* get max clock state from PPLIB */ Patches currently in stable-queue which might be from rosenp@gmail.com are queue-6.12/drm-amd-amdgpu-decouple-aspm-with-pcie-dpm.patch queue-6.12/drm-amd-display-reject-modes-with-too-high-pixel-clock-on-dce6-10.patch queue-6.12/drm-amd-display-fix-dce-6.0-and-6.4-pll-programming.patch queue-6.12/drm-amd-display-disable-scaling-on-dce6-for-now.patch queue-6.12/drm-amd-display-disable-fastboot-on-dce-6-too.patch queue-6.12/drm-amd-display-correct-logic-check-error-for-fastboot.patch queue-6.12/drm-amd-amdgpu-disable-aspm-in-some-situations.patch queue-6.12/drm-amd-display-keep-pll0-running-on-dce-6.0-and-6.4.patch queue-6.12/drm-amd-display-adjust-dce-8-10-clock-don-t-overclock-by-15.patch queue-6.12/drm-amd-disable-aspm-on-si.patch