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[94.27.152.162]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-44123d23e0bsm15792782f8f.15.2026.04.23.12.15.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2026 12:15:21 -0700 (PDT) From: =?UTF-8?q?Timur=20Krist=C3=B3f?= To: amd-gfx@lists.freedesktop.org, alexander.deucher@amd.com, Alex Hung , Harry Wentland , Roman Li , Leo Li , David Airlie , Mario Limonciello , Ivan Lipski , Melissa Wen Cc: =?UTF-8?q?Timur=20Krist=C3=B3f?= Subject: [PATCH 00/14] drm/amd: Delete defunct DAL power level code Date: Thu, 23 Apr 2026 21:15:05 +0200 Message-ID: <20260423191519.73127-1-timur.kristof@gmail.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" Delete unused code related to DAL power levels. It seems that the DAL power level concept has been never fully implemented and was thus non-functional in amdgpu. DCE 11.0 and 11.2 never actually relied on the power level because they calculate all necessary power requirements in dce_calcs and communicate that using dm_pp_apply_display_requirements() to the power management code. DCE 6, 8 and 10 also didn't rely on power levels because they always just set the maximum possible display clock and the power management code already takes that into account when setting the power state. This was somewhat improved recently by also using dm_pp_apply_display_requirements() on these DCE versions. The code base for newer GPUs doesn't use the concept of power levels anymore either, so this change reduces the maintenance burden of the old DCE code. On the DC side: dm_pp_apply_power_level_change_request() was never implemented in amdgpu_dm, and DC has been working fine for years without it. Let's delete the dummy function and the code that calls it. With that, we can also delete the power levels and the static arrays containing hardcoded power level values. These were never used for anything, only for finding the maximum supported display clock. On the AMDGPU PM side: The get_dal_power_level() implementations were dummy on SMU10, Vega10, Vega12 and Vega20 meaning that they didn't return an actual DAL power level, and were non-functional on SMU8 which always returned the highest possible power level. Nothing actually relied on the power level returned by these functions. Let's delete them. What's next: After this code cleanup lands, I have plans to further improve display power management on old DCE. Timur Kristóf (14): drm/amd/display: Delete unimplemented dm_pp_apply_power_level_change_request() drm/amd/display: Delete dce_get_required_clocks_state() drm/amd/display: Remove min/max clock levels from clk_mgr drm/amd/display: Delete max_clocks_state from dm_pp_static_clock_info drm/amd/display: Set max supported display clock without max_clks_by_state drm/amd/display: Delete max_clks_by_state from DCE clock manager drm/amd/display: Delete disp_clk_voltage from integrated info drm/amd/display: Delete dm_pp_clocks_state drm/amd/pm: Delete unused get_display_power_level() function drm/amd/pm: Delete dummy get_dal_power_level implementations drm/amd/pm: Delete non-functional SMU8 get_dal_power_level implementation drm/amd/pm: Delete vddc_dep_on_dal_pwrl drm/amd/pm: Delete get_dal_power_level drm/amd/pm: Delete PP_DAL_POWERLEVEL .../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 39 ----- .../gpu/drm/amd/display/dc/bios/bios_parser.c | 36 ----- .../drm/amd/display/dc/bios/bios_parser2.c | 9 -- .../display/dc/clk_mgr/dce100/dce_clk_mgr.c | 144 ++---------------- .../display/dc/clk_mgr/dce100/dce_clk_mgr.h | 3 - .../dc/clk_mgr/dce110/dce110_clk_mgr.c | 25 --- .../dc/clk_mgr/dce112/dce112_clk_mgr.c | 41 ----- .../dc/clk_mgr/dce120/dce120_clk_mgr.c | 16 -- drivers/gpu/drm/amd/display/dc/dm_services.h | 4 - .../drm/amd/display/dc/dm_services_types.h | 30 ---- .../amd/display/dc/inc/hw/clk_mgr_internal.h | 4 - .../display/include/grph_object_ctrl_defs.h | 9 -- drivers/gpu/drm/amd/include/dm_pp_interface.h | 19 --- .../gpu/drm/amd/include/kgd_pp_interface.h | 2 - .../gpu/drm/amd/pm/powerplay/amd_powerplay.c | 22 --- .../amd/pm/powerplay/hwmgr/hardwaremanager.c | 10 -- .../amd/pm/powerplay/hwmgr/processpptables.c | 1 - .../drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 48 ------ .../drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c | 64 -------- .../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 18 --- .../drm/amd/pm/powerplay/hwmgr/vega12_hwmgr.c | 16 -- .../drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c | 17 --- .../amd/pm/powerplay/inc/hardwaremanager.h | 3 - drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h | 4 - 24 files changed, 11 insertions(+), 573 deletions(-) -- 2.53.0